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authorWolfgang Denk <wd@denx.de>2007-05-05 18:23:11 +0200
committerWolfgang Denk <wd@denx.de>2007-05-05 18:23:11 +0200
commit2f15278c2eb911c668b4fe562130b78cf554d139 (patch)
treead2e9e57fc940d86a9d219812736fea77585cdf9 /cpu
parentf51697316ad53e99bf1be354964dacd9fed72a04 (diff)
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Coding stylke cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc85xx/cpu.c18
-rw-r--r--cpu/ppc4xx/4xx_enet.c4
2 files changed, 11 insertions, 11 deletions
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 63176d2..7735a52 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -71,14 +71,14 @@ int checkcpu (void)
puts("8548_E");
break;
case SVR_8544:
- puts("8544");
- break;
- case SVR_8544_E:
- puts("8544_E");
- break;
- case SVR_8568_E:
- puts("8568_E");
- break;
+ puts("8544");
+ break;
+ case SVR_8544_E:
+ puts("8544_E");
+ break;
+ case SVR_8568_E:
+ puts("8568_E");
+ break;
default:
puts("Unknown");
break;
@@ -157,7 +157,7 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
/* e500 v2 core has reset control register */
volatile unsigned int * rstcr;
rstcr = (volatile unsigned int *)(CFG_IMMR + 0xE00B0);
- *rstcr = 0x2; /* HRESET_REQ */
+ *rstcr = 0x2; /* HRESET_REQ */
}else{
/*
* Initiate hard reset in debug control register DBCR0
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index be4e824..1200d02 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -344,7 +344,7 @@ int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis)
mfsdr(sdr_pfc1, pfc1);
pfc1 &= SDR0_PFC1_SELECT_MASK;
- switch (pfc1) {
+ switch (pfc1) {
case SDR0_PFC1_SELECT_CONFIG_2:
/* 1 x GMII port */
out32 (ZMII_FER, 0x00);
@@ -361,7 +361,7 @@ int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis)
break;
case SDR0_PFC1_SELECT_CONFIG_6:
/* 2 x SMII ports */
- out32 (ZMII_FER,
+ out32 (ZMII_FER,
((ZMII_FER_SMII) << ZMII_FER_V(0)) |
((ZMII_FER_SMII) << ZMII_FER_V(1)));
out32 (RGMII_FER, 0x00000000);