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| author | Richard Retanubun <RichardRetanubun@RuggedCom.com> | 2009-01-23 09:27:00 -0500 |
|---|---|---|
| committer | John Rigby <jrigby@freescale.com> | 2009-02-06 14:54:46 -0700 |
| commit | 4ffc39050aa46ed8a3d29732293dff769e54fffa (patch) | |
| tree | 94fa1d6b26862c14e5b8223cd258db068ca31ce4 /cpu | |
| parent | 9d8811c5bd2b7dd6307742cf22fbdb7953b6f816 (diff) | |
| download | u-boot-imx-4ffc39050aa46ed8a3d29732293dff769e54fffa.zip u-boot-imx-4ffc39050aa46ed8a3d29732293dff769e54fffa.tar.gz u-boot-imx-4ffc39050aa46ed8a3d29732293dff769e54fffa.tar.bz2 | |
Coldfire: Fix half-baud UART by adding M5271 to Coldfire v2 core list
Added the CONFIG_M5271 to the list of Coldfire V2 processor. This
was causing the bus clock (not CPU clock) to be declared twice as
fast as it actually is. This causes UARTS to operate at half the
specified baudrate.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mcf52x2/speed.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c index fe51fb4..c93a518 100644 --- a/cpu/mcf52x2/speed.c +++ b/cpu/mcf52x2/speed.c @@ -77,7 +77,8 @@ int get_clocks (void) #endif gd->cpu_clk = CONFIG_SYS_CLK; -#if defined(CONFIG_M5249) || defined(CONFIG_M5253) || defined(CONFIG_M5275) +#if defined(CONFIG_M5249) || defined(CONFIG_M5253) || \ + defined(CONFIG_M5271) || defined(CONFIG_M5275) gd->bus_clk = gd->cpu_clk / 2; #else gd->bus_clk = gd->cpu_clk; |