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authorKumar Gala <galak@kernel.crashing.org>2008-10-23 01:47:37 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-10-24 15:10:23 -0500
commita38a5b6edd30f29fd5fdb1d7f674521906c0e677 (patch)
tree4b2ba624c599bf59be35f2500d064043fd9eec34 /cpu
parentd9d8c7c696dec370ca714c03beb6e79d4c90bd5e (diff)
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85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number
Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle e500mc's 64-byte cacheline properly when it gets added. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc85xx/start.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index fc3c336..f16d4c0 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -998,8 +998,8 @@ trap_reloc:
.globl unlock_ram_in_cache
unlock_ram_in_cache:
/* invalidate the INIT_RAM section */
- lis r3,(CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
- ori r3,r3,(CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
+ lis r3,(CONFIG_SYS_INIT_RAM_ADDR & ~(CONFIG_SYS_CACHELINE_SIZE-1))@h
+ ori r3,r3,(CONFIG_SYS_INIT_RAM_ADDR & ~(CONFIG_SYS_CACHELINE_SIZE-1))@l
mfspr r4,L1CFG0
andi. r4,r4,0x1ff
slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT)