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authorJohn Rigby <jrigby@freescale.com>2008-02-26 09:38:14 -0700
committerWolfgang Denk <wd@denx.de>2008-03-02 21:44:59 +0100
commit5f91db7f582ca17b1f19f10189c025696f333d2e (patch)
tree2a5bbb89342615e82ee47312d3e00641632a26ed /cpu
parent44b4dbed4133f657705b7c5193209da9978243a7 (diff)
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MPC5121e ADS PCI support take 3
Adds PCI support for MPC5121 Tested with drivers/net/rtl8139.c Support is conditional since PCI on old silicon does not work. ads5121_PCI_config turns on PCI In this version, condition compilation of PCI code has been moved from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as suggested by Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: John Rigby <jrigby@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc512x/speed.c21
1 files changed, 16 insertions, 5 deletions
diff --git a/cpu/mpc512x/speed.c b/cpu/mpc512x/speed.c
index 99e3495..cfaffb5 100644
--- a/cpu/mpc512x/speed.c
+++ b/cpu/mpc512x/speed.c
@@ -67,12 +67,14 @@ int get_clocks (void)
u8 cpmf;
u8 sys_div;
u8 ips_div;
+ u8 pci_div;
u32 ref_clk = CFG_MPC512X_CLKIN;
u32 spll;
u32 sys_clk;
u32 core_clk;
u32 csb_clk;
u32 ips_clk;
+ u32 pci_clk;
if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
return -1;
@@ -95,8 +97,16 @@ int get_clocks (void)
/* in case we cannot get a sane IPS divisor, fail gracefully */
ips_clk = 0;
}
+ pci_div = (im->clk.scfr[0] & SCFR1_PCI_DIV_MASK) >> SCFR1_PCI_DIV_SHIFT;
+ if (pci_div != 0) {
+ pci_clk = csb_clk / pci_div;
+ } else {
+ /* in case we cannot get a sane IPS divisor, fail gracefully */
+ pci_clk = 333333;
+ }
gd->ips_clk = ips_clk;
+ gd->pci_clk = pci_clk;
gd->csb_clk = csb_clk;
gd->cpu_clk = core_clk;
gd->bus_clk = csb_clk;
@@ -115,11 +125,12 @@ ulong get_bus_freq (ulong dummy)
int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- printf ("Clock configuration:\n");
- printf (" CPU: %4d MHz\n", gd->cpu_clk / 1000000);
- printf (" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
- printf (" IPS Bus: %4d MHz\n", gd->ips_clk / 1000000);
- printf (" DDR: %4d MHz\n", 2 * gd->csb_clk / 1000000);
+ printf("Clock configuration:\n");
+ printf(" CPU: %4d MHz\n", gd->cpu_clk / 1000000);
+ printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
+ printf(" IPS Bus: %4d MHz\n", gd->ips_clk / 1000000);
+ printf(" PCI: %4d MHz\n", gd->pci_clk / 1000000);
+ printf(" DDR: %4d MHz\n", 2 * gd->csb_clk / 1000000);
return 0;
}