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authorWolfgang Denk <wd@denx.de>2008-04-13 09:59:26 -0700
committerWolfgang Denk <wd@denx.de>2008-04-13 09:59:26 -0700
commit1aeed8d71acb3290cf2446f316d6ba437e7881c4 (patch)
tree475d54d2773652e6103291bfdd63d9c27b68a0a8 /cpu
parent8c8428a576f632745306e288b629e30d420c0f5a (diff)
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Coding Style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/leon2/start.S10
-rw-r--r--cpu/leon3/start.S4
-rw-r--r--cpu/mcf52x2/speed.c12
3 files changed, 14 insertions, 12 deletions
diff --git a/cpu/leon2/start.S b/cpu/leon2/start.S
index 937ea1e..60d3fad 100644
--- a/cpu/leon2/start.S
+++ b/cpu/leon2/start.S
@@ -118,7 +118,7 @@ _trap_table:
TRAPI(13); ! 1d IRQ level 13
TRAPI(14); ! 1e IRQ level 14
TRAP(_nmi_trap); ! 1f IRQ level 15 /
- ! NMI (non maskable interrupt)
+ ! NMI (non maskable interrupt)
BAD_TRAP; ! 20 r_register_access_error
BAD_TRAP; ! 21 instruction access error
BAD_TRAP; ! 22
@@ -213,9 +213,9 @@ _hardreset:
nop
/* Init Cache */
- set (LEON2_PREGS+LEON_REG_CACHECTRL_OFFSET), %g1
- set 0x0081000f, %g2
- st %g2, [%g1]
+ set (LEON2_PREGS+LEON_REG_CACHECTRL_OFFSET), %g1
+ set 0x0081000f, %g2
+ st %g2, [%g1]
mov %g0, %y
clr %g1
@@ -584,7 +584,7 @@ trap_setup:
or %t_wim, %g2, %g2
and %g2, 0xff, %g2
- save %g0, %g0, %g0 ! get in window to be saved
+ save %g0, %g0, %g0 ! get in window to be saved
/* Set new %wim value */
wr %g2, 0x0, %wim
diff --git a/cpu/leon3/start.S b/cpu/leon3/start.S
index 807f7e8..2f1d099 100644
--- a/cpu/leon3/start.S
+++ b/cpu/leon3/start.S
@@ -359,8 +359,8 @@ prom_relocate_loop:
nop
nop
nop
-
-/* If CACHE snooping is available in hardware the
+
+/* If CACHE snooping is available in hardware the
* variable leon3_snooping_avail will be set to
* 0x800000 else 0.
*/
diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c
index 85a5c4d..5fafcd8 100644
--- a/cpu/mcf52x2/speed.c
+++ b/cpu/mcf52x2/speed.c
@@ -67,11 +67,13 @@ int get_clocks (void)
#if defined(CONFIG_M5275)
volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
- /* Setup PLL */
- pll->syncr = 0x01080000;
- while (!(pll->synsr & FMPLL_SYNSR_LOCK));
- pll->syncr = 0x01000000;
- while (!(pll->synsr & FMPLL_SYNSR_LOCK));
+ /* Setup PLL */
+ pll->syncr = 0x01080000;
+ while (!(pll->synsr & FMPLL_SYNSR_LOCK)
+ ;
+ pll->syncr = 0x01000000;
+ while (!(pll->synsr & FMPLL_SYNSR_LOCK))
+ ;
#endif
gd->cpu_clk = CFG_CLK;