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authorKumar Gala <galak@kernel.crashing.org>2007-10-02 11:12:27 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2007-10-19 11:25:01 -0500
commite1ce3cb617bb06f91f82f98915391175addf3e82 (patch)
tree859de3ebe9e95aff1256180b5a8abaf187219947 /cpu
parentd4d1e9bee7c45ea8c513d3af697c864107f1c4d1 (diff)
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Remove magic numbers from cache related operations for mpc85xx
The mpc85xx start code uses some magic numbers that we actually have #defines for in <config.h> so use those instead. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc85xx/start.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 5d65190..e5cabca 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -266,13 +266,13 @@ _start_e500:
*/
lis r3,CFG_INIT_RAM_ADDR@h
ori r3,r3,CFG_INIT_RAM_ADDR@l
- li r2,512 /* 512*32=16K */
+ li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
mtctr r2
li r0,0
1:
dcbz r0,r3
dcbtls 0,r0,r3
- addi r3,r3,32
+ addi r3,r3,CFG_CACHELINE_SIZE
bdnz 1b
/* Jump out the last 4K page and continue to 'normal' start */
@@ -1066,11 +1066,11 @@ unlock_ram_in_cache:
/* invalidate the INIT_RAM section */
lis r3,(CFG_INIT_RAM_ADDR & ~31)@h
ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
- li r4,512
+ li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
mtctr r4
1: icbi r0,r3
dcbi r0,r3
- addi r3,r3,32
+ addi r3,r3,CFG_CACHELINE_SIZE
bdnz 1b
sync /* Wait for all icbi to complete on bus */
isync