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authorTom Rix <Tom.Rix@windriver.com>2009-05-29 18:57:31 -0500
committerWolfgang Denk <wd@denx.de>2009-06-12 20:45:47 +0200
commit708cfb74b7c6df9c37d3c48988a154be79daefeb (patch)
treea3423ef05bd7272435f5bf34dcbb8e8c9e9c11a1 /cpu
parent59272620c24549b5bcd03c94ba12ec302c1476a2 (diff)
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OMAP3 Turn on the GPIO bank clocks
The function and interface clocks for each GPIO bank, except the first, must be explicitly turned on. These are controlled by the config level defines CONFIG_OMAP3_GPIO_n where n is from 2 to 6. Signed-off-by: Tom Rix <Tom.Rix@windriver.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm_cortexa8/omap3/clock.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/cpu/arm_cortexa8/omap3/clock.c b/cpu/arm_cortexa8/omap3/clock.c
index d035677..0306b6c 100644
--- a/cpu/arm_cortexa8/omap3/clock.c
+++ b/cpu/arm_cortexa8/omap3/clock.c
@@ -357,6 +357,28 @@ void per_clocks_enable(void)
sr32(&prcm_base->fclken_per, 11, 1, 0x1);
sr32(&prcm_base->iclken_per, 11, 1, 0x1);
#endif
+
+#ifdef CONFIG_OMAP3_GPIO_2
+ sr32(&prcm_base->fclken_per, 13, 1, 1);
+ sr32(&prcm_base->iclken_per, 13, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_3
+ sr32(&prcm_base->fclken_per, 14, 1, 1);
+ sr32(&prcm_base->iclken_per, 14, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_4
+ sr32(&prcm_base->fclken_per, 15, 1, 1);
+ sr32(&prcm_base->iclken_per, 15, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_5
+ sr32(&prcm_base->fclken_per, 16, 1, 1);
+ sr32(&prcm_base->iclken_per, 16, 1, 1);
+#endif
+#ifdef CONFIG_OMAP3_GPIO_6
+ sr32(&prcm_base->fclken_per, 17, 1, 1);
+ sr32(&prcm_base->iclken_per, 17, 1, 1);
+#endif
+
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
/* Turn on all 3 I2C clocks */
sr32(&prcm_base->fclken1_core, 15, 3, 0x7);