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authorWolfgang Denk <wd@denx.de>2008-05-03 20:46:40 +0200
committerWolfgang Denk <wd@denx.de>2008-05-03 20:46:40 +0200
commit56bb37e4b92b690d76026133f26cb7a640c8d5bb (patch)
tree7afe9a6c4547af9fe813e88f7b08e4be864f3eb2 /cpu
parent0072b78be2b41e5a0ca3ddc39335574dc2e855bd (diff)
parent4f27098e5b0736989b13cd61d7bca94b3574cf5f (diff)
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Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ppc4xx/44x_spd_ddr2.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index 5b5de48..ec76b71 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -1,7 +1,10 @@
/*
* cpu/ppc4xx/44x_spd_ddr2.c
* This SPD SDRAM detection code supports AMCC PPC44x cpu's with a
- * DDR2 controller (non Denali Core). Those are 440SP/SPe.
+ * DDR2 controller (non Denali Core). Those currently are:
+ *
+ * 405: 405EX
+ * 440/460: 440SP/440SPe/460EX/460GT
*
* (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
@@ -2078,7 +2081,7 @@ static void program_bxcf(unsigned long *dimm_populated,
if (num_banks == 4)
ind = 0;
else
- ind = 5;
+ ind = 5 << 8;
switch (num_col_addr) {
case 0x08:
mode |= (SDRAM_BXCF_M_AM_0 + ind);