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authorKumar Gala <galak@kernel.crashing.org>2008-04-29 10:27:08 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-04-29 11:44:29 -0500
commit45239cf4152109caa925145ccd433529902df887 (patch)
treecbeedce4c8e289bf2da8f6a4afa3677f57578ccd /cpu
parentef7d30b14394e4c4a153118f5845760cadada02a (diff)
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85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
All the 85xx and 86xx UM describe the register as timing_cfg_3 not as ext_refrec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc85xx/spd_sdram.c4
-rw-r--r--cpu/mpc86xx/spd_sdram.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index 435458a..e3a8249 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -610,8 +610,8 @@ spd_sdram(void)
/*
* Sneak in some Extended Refresh Recovery.
*/
- ddr->ext_refrec = (trfc_high << 16);
- debug("DDR: ext_refrec = 0x%08x\n", ddr->ext_refrec);
+ ddr->timing_cfg_3 = (trfc_high << 16);
+ debug("DDR: timing_cfg_3 = 0x%08x\n", ddr->timing_cfg_3);
ddr->timing_cfg_1 =
(0
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index 60a7818..8485841 100644
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -644,8 +644,8 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
/*
* Sneak in some Extended Refresh Recovery.
*/
- ddr->ext_refrec = (trfc_high << 16);
- debug("DDR: ext_refrec = 0x%08x\n", ddr->ext_refrec);
+ ddr->timing_cfg_3 = (trfc_high << 16);
+ debug("DDR: timing_cfg_3 = 0x%08x\n", ddr->timing_cfg_3);
ddr->timing_cfg_1 =
(0