diff options
author | Terry Lv <r65388@freescale.com> | 2012-02-17 00:34:16 +0800 |
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committer | Terry Lv <r65388@freescale.com> | 2012-02-17 00:36:01 +0800 |
commit | 72e8b5a4858d802d5135ba0d4b41ea9554a8c987 (patch) | |
tree | ec845813d4feb4006ed3288e1e461152e5e192a9 /cpu | |
parent | 362b35f6dca0da338cd242353fa14f02f2f5a5fb (diff) | |
download | u-boot-imx-72e8b5a4858d802d5135ba0d4b41ea9554a8c987.zip u-boot-imx-72e8b5a4858d802d5135ba0d4b41ea9554a8c987.tar.gz u-boot-imx-72e8b5a4858d802d5135ba0d4b41ea9554a8c987.tar.bz2 |
ENGR00174625: Remove build warnings for mx6q
Remove build warnings for mx6q.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/arm_cortexa8/cpu.c | 4 | ||||
-rw-r--r-- | cpu/arm_cortexa8/mx6/generic.c | 6 |
2 files changed, 8 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/cpu.c b/cpu/arm_cortexa8/cpu.c index a7a6fb7..58cb529 100644 --- a/cpu/arm_cortexa8/cpu.c +++ b/cpu/arm_cortexa8/cpu.c @@ -8,7 +8,7 @@ * (C) Copyright 2002 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> * - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -137,6 +137,8 @@ int cleanup_before_linux(void) unsigned int i; #ifdef CONFIG_CMD_IMX_DOWNLOAD_MODE + extern void clear_mfgmode_mem(void); + clear_mfgmode_mem(); #endif diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c index 144924a..58e4966 100644 --- a/cpu/arm_cortexa8/mx6/generic.c +++ b/cpu/arm_cortexa8/mx6/generic.c @@ -1066,6 +1066,8 @@ void set_usboh3_clk(void) /*BOOT_CFG1[7..4] = 0x3 Boot from Serial ROM (I2C/SPI)*/ #define BOOT_MODE_SERIAL_ROM (0x00000030) +extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + /* this function should call before enter linux, otherwise, you * watchdog reset will enter mfg download mode again, clear this bit * to prevent this behavior */ @@ -1082,7 +1084,7 @@ void clear_mfgmode_mem(void) reg = writel(reg, SRC_BASE_ADDR + SRC_GPR10); } -void do_switch_mfgmode(void) +int do_switch_mfgmode(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { u32 reg; @@ -1104,6 +1106,8 @@ void do_switch_mfgmode(void) * mode. */ do_reset(NULL, 0, 0, NULL); + + return 0; } U_BOOT_CMD( |