diff options
author | Andy Fleming <afleming@freescale.com> | 2007-08-14 00:14:25 -0500 |
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committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2007-08-14 01:47:44 -0500 |
commit | da9d4610d76e52c4d20a8f3d8433439a7fcf5b71 (patch) | |
tree | 878ce01e8e6059383e74d42fdc809b8087a1fcdd /cpu | |
parent | c59e4091ffe0148398b9e9ff14a019ea038b7432 (diff) | |
download | u-boot-imx-da9d4610d76e52c4d20a8f3d8433439a7fcf5b71.zip u-boot-imx-da9d4610d76e52c4d20a8f3d8433439a7fcf5b71.tar.gz u-boot-imx-da9d4610d76e52c4d20a8f3d8433439a7fcf5b71.tar.bz2 |
Add support for UEC to 8568
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/mpc85xx/Makefile | 2 | ||||
-rw-r--r-- | cpu/mpc85xx/cpu.c | 24 | ||||
-rw-r--r-- | cpu/mpc85xx/cpu_init.c | 33 | ||||
-rw-r--r-- | cpu/mpc85xx/qe_io.c | 85 |
4 files changed, 142 insertions, 2 deletions
diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile index ff67dcd..32091fa 100644 --- a/cpu/mpc85xx/Makefile +++ b/cpu/mpc85xx/Makefile @@ -30,7 +30,7 @@ LIB = $(obj)lib$(CPU).a START = start.o resetvec.o COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \ - pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o + pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o qe_io.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 1d791c9..08e0468 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -280,7 +280,7 @@ ft_cpu_setup(void *blob, bd_t *bd) if (p != NULL) *p = cpu_to_be32(clock); -#if defined(CONFIG_TSEC1) +#if defined(CONFIG_HAS_ETH0) p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len); if (p) memcpy(p, bd->bi_enetaddr, 6); @@ -308,6 +308,17 @@ ft_cpu_setup(void *blob, bd_t *bd) p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/local-mac-address", &len); if (p) memcpy(p, bd->bi_enet2addr, 6); + +#ifdef CONFIG_UEC_ETH + p = ft_get_prop(blob, "/" OF_QE "/ucc@2000/mac-address", &len); + if (p) + memcpy(p, bd->bi_enet2addr, 6); + + p = ft_get_prop(blob, "/" OF_QE "/ucc@2000/local-mac-address", &len); + if (p) + memcpy(p, bd->bi_enet2addr, 6); + +#endif #endif #if defined(CONFIG_HAS_ETH3) @@ -318,6 +329,17 @@ ft_cpu_setup(void *blob, bd_t *bd) p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/local-mac-address", &len); if (p) memcpy(p, bd->bi_enet3addr, 6); + +#ifdef CONFIG_UEC_ETH + p = ft_get_prop(blob, "/" OF_QE "/ucc@3000/mac-address", &len); + if (p) + memcpy(p, bd->bi_enet3addr, 6); + + p = ft_get_prop(blob, "/" OF_QE "/ucc@3000/local-mac-address", &len); + if (p) + memcpy(p, bd->bi_enet3addr, 6); + +#endif #endif } diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index c7fe130..7b99610 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -34,6 +34,29 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_QE +extern qe_iop_conf_t qe_iop_conf_tab[]; +extern void qe_config_iopin(u8 port, u8 pin, int dir, + int open_drain, int assign); +extern void qe_init(uint qe_base); +extern void qe_reset(void); + +static void config_qe_ioports(void) +{ + u8 port, pin; + int dir, open_drain, assign; + int i; + + for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) { + port = qe_iop_conf_tab[i].port; + pin = qe_iop_conf_tab[i].pin; + dir = qe_iop_conf_tab[i].dir; + open_drain = qe_iop_conf_tab[i].open_drain; + assign = qe_iop_conf_tab[i].assign; + qe_config_iopin(port, pin, dir, open_drain, assign); + } +} +#endif #ifdef CONFIG_CPM2 static void config_8560_ioports (volatile immap_t * immr) @@ -181,6 +204,11 @@ void cpu_init_f (void) #if defined(CONFIG_CPM2) m8560_cpm_reset(); #endif +#ifdef CONFIG_QE + /* Config QE ioports */ + config_qe_ioports(); +#endif + } @@ -262,6 +290,11 @@ int cpu_init_r(void) #else printf("L2 cache: disabled\n"); #endif +#ifdef CONFIG_QE + uint qe_base = CFG_IMMR + 0x00080000; /* QE immr base */ + qe_init(qe_base); + qe_reset(); +#endif return 0; } diff --git a/cpu/mpc85xx/qe_io.c b/cpu/mpc85xx/qe_io.c new file mode 100644 index 0000000..8878bc5 --- /dev/null +++ b/cpu/mpc85xx/qe_io.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2006 Freescale Semiconductor, Inc. + * + * Dave Liu <daveliu@freescale.com> + * based on source code of Shlomi Gridish + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include "common.h" +#include "asm/errno.h" +#include "asm/io.h" +#include "asm/immap_85xx.h" + +#if defined(CONFIG_QE) +#define NUM_OF_PINS 32 +void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign) +{ + u32 pin_2bit_mask; + u32 pin_2bit_dir; + u32 pin_2bit_assign; + u32 pin_1bit_mask; + u32 tmp_val; + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile par_io_t *par_io = (volatile par_io_t *) + &(im->im_gur.qe_par_io); + + /* Caculate pin location and 2bit mask and dir */ + pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); + pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2)); + + /* Setup the direction */ + tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \ + in_be32(&par_io[port].cpdir2) : + in_be32(&par_io[port].cpdir1); + + if (pin > (NUM_OF_PINS/2) -1) { + out_be32(&par_io[port].cpdir2, ~pin_2bit_mask & tmp_val); + out_be32(&par_io[port].cpdir2, pin_2bit_dir | tmp_val); + } else { + out_be32(&par_io[port].cpdir1, ~pin_2bit_mask & tmp_val); + out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val); + } + + /* Calculate pin location for 1bit mask */ + pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1))); + + /* Setup the open drain */ + tmp_val = in_be32(&par_io[port].cpodr); + if (open_drain) + out_be32(&par_io[port].cpodr, pin_1bit_mask | tmp_val); + else + out_be32(&par_io[port].cpodr, ~pin_1bit_mask & tmp_val); + + /* Setup the assignment */ + tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? + in_be32(&par_io[port].cppar2): + in_be32(&par_io[port].cppar1); + pin_2bit_assign = (u32)(assign + << (NUM_OF_PINS - (pin%(NUM_OF_PINS/2)+1)*2)); + + /* Clear and set 2 bits mask */ + if (pin > (NUM_OF_PINS/2) - 1) { + out_be32(&par_io[port].cppar2, ~pin_2bit_mask & tmp_val); + out_be32(&par_io[port].cppar2, pin_2bit_assign | tmp_val); + } else { + out_be32(&par_io[port].cppar1, ~pin_2bit_mask & tmp_val); + out_be32(&par_io[port].cppar1, pin_2bit_assign | tmp_val); + } +} + +#endif /* CONFIG_QE */ |