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authorStefan Roese <sr@denx.de>2007-03-01 21:16:02 +0100
committerStefan Roese <sr@denx.de>2007-03-01 21:16:02 +0100
commitc8556d0e0b27c57c0860f55736761a18c7a115f2 (patch)
tree4ab1cc720d191688c72fc4ebcfb49c384c0a0228 /cpu
parentba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35 (diff)
parent8c12045a3b06c5b6675d3fe02fbc9f545988129a (diff)
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Merge with /home/stefan/git/u-boot/denx-merge-sr
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ppc4xx/44x_spd_ddr2.c28
-rw-r--r--cpu/ppc4xx/start.S14
-rw-r--r--cpu/ppc4xx/tlb.c6
3 files changed, 24 insertions, 24 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index fe0f2b6..35b2315 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -48,10 +48,10 @@
* Defines
*-----------------------------------------------------------------------------*/
#ifndef TRUE
-#define TRUE 1
+#define TRUE 1
#endif
#ifndef FALSE
-#define FALSE 0
+#define FALSE 0
#endif
#define SDRAM_DDR1 1
@@ -199,9 +199,9 @@ static void program_DQS_calibration(unsigned long *dimm_populated,
unsigned char *iic0_dimm_addr,
unsigned long num_dimm_banks);
#ifdef HARD_CODED_DQS /* calibration test with hardvalues */
-static void test(void);
+static void test(void);
#else
-static void DQS_calibration_process(void);
+static void DQS_calibration_process(void);
#endif
#if defined(DEBUG)
static void ppc440sp_sdram_register_dump(void);
@@ -354,12 +354,12 @@ static unsigned long sdram_memsize(void)
* .data sections. It also cannot call routines that require these sections.
*-----------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------
- * Function: initdram
+ * Function: initdram
* Description: Configures SDRAM memory banks for DDR operation.
- * Auto Memory Configuration option reads the DDR SDRAM EEPROMs
- * via the IIC bus and then configures the DDR SDRAM memory
- * banks appropriately. If Auto Memory Configuration is
- * not used, it is assumed that no DIMM is plugged
+ * Auto Memory Configuration option reads the DDR SDRAM EEPROMs
+ * via the IIC bus and then configures the DDR SDRAM memory
+ * banks appropriately. If Auto Memory Configuration is
+ * not used, it is assumed that no DIMM is plugged
*-----------------------------------------------------------------------------*/
long int initdram(int board_type)
{
@@ -589,10 +589,10 @@ static void get_spd_info(unsigned long *dimm_populated,
#ifdef CONFIG_ADD_RAM_INFO
void board_add_ram_info(int use_default)
{
- if (is_ecc_enabled())
- puts(" (ECC enabled)");
- else
- puts(" (ECC not enabled)");
+ if (is_ecc_enabled())
+ puts(" (ECC enabled)");
+ else
+ puts(" (ECC not enabled)");
}
#endif
@@ -1165,7 +1165,7 @@ static void program_initplr(unsigned long *dimm_populated,
/******************************************************
** Assumption: if more than one DIMM, all DIMMs are the same
- ** as already checked in check_memory_type
+ ** as already checked in check_memory_type
******************************************************/
if ((dimm_populated[0] == SDRAM_DDR1) || (dimm_populated[1] == SDRAM_DDR1)) {
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index cd2ccec..24b30df 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1859,11 +1859,11 @@ pll_wait:
#if defined(CONFIG_440)
#define function_prolog(func_name) .text; \
- .align 2; \
- .globl func_name; \
- func_name:
+ .align 2; \
+ .globl func_name; \
+ func_name:
#define function_epilog(func_name) .type func_name,@function; \
- .size func_name,.-func_name
+ .size func_name,.-func_name
/*----------------------------------------------------------------------------+
| mttlb3.
@@ -1877,7 +1877,7 @@ pll_wait:
| mftlb3.
+----------------------------------------------------------------------------*/
function_prolog(mftlb3)
- TLBRE(3,3,2)
+ TLBRE(3,3,2)
blr
function_epilog(mftlb3)
@@ -1893,7 +1893,7 @@ pll_wait:
| mftlb2.
+----------------------------------------------------------------------------*/
function_prolog(mftlb2)
- TLBRE(3,3,1)
+ TLBRE(3,3,1)
blr
function_epilog(mftlb2)
@@ -1909,7 +1909,7 @@ pll_wait:
| mftlb1.
+----------------------------------------------------------------------------*/
function_prolog(mftlb1)
- TLBRE(3,3,0)
+ TLBRE(3,3,0)
blr
function_epilog(mftlb1)
diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c
index 08ae76c..50344a4 100644
--- a/cpu/ppc4xx/tlb.c
+++ b/cpu/ppc4xx/tlb.c
@@ -37,8 +37,8 @@ typedef struct region {
} region_t;
static int add_tlb_entry(unsigned long base_addr,
- unsigned long tlb_word0_size_value,
- unsigned long tlb_word2_i_value)
+ unsigned long tlb_word0_size_value,
+ unsigned long tlb_word2_i_value)
{
int i;
unsigned long tlb_word0_value;
@@ -82,7 +82,7 @@ static int add_tlb_entry(unsigned long base_addr,
}
static void program_tlb_addr(unsigned long base_addr, unsigned long mem_size,
- unsigned long tlb_word2_i_value)
+ unsigned long tlb_word2_i_value)
{
int rc;
int tlb_i;