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| author | Kumar Gala <galak@kernel.crashing.org> | 2008-02-27 16:30:47 -0600 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-02-27 16:30:47 -0600 |
| commit | 2b22fa4baee51e6b467c44ea1be0d1ecd86e8775 (patch) | |
| tree | 101b618786231210f859784693348517b481c7c6 /cpu | |
| parent | 534ea6b6f86f8b75ef2ac061ef110a98f103d7d6 (diff) | |
| download | u-boot-imx-2b22fa4baee51e6b467c44ea1be0d1ecd86e8775.zip u-boot-imx-2b22fa4baee51e6b467c44ea1be0d1ecd86e8775.tar.gz u-boot-imx-2b22fa4baee51e6b467c44ea1be0d1ecd86e8775.tar.bz2 | |
85xx: Don't icbi when unlocking the cache
There is no reason to icbi when invalidating the temporary stack in
the d-cache. Its impossible on e500 to have the i-cache contain
any addresses in the temp stack and it can be problematic in generating
transactions on the bus to non-valid addresses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc85xx/start.S | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 636ef5d..15b804d 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -992,7 +992,6 @@ trap_reloc: blr -#ifdef CFG_INIT_RAM_LOCK .globl unlock_ram_in_cache unlock_ram_in_cache: /* invalidate the INIT_RAM section */ @@ -1002,11 +1001,10 @@ unlock_ram_in_cache: andi. r4,r4,0x1ff slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT) mtctr r4 -1: icbi r0,r3 - dcbi r0,r3 +1: dcbi r0,r3 addi r3,r3,CFG_CACHELINE_SIZE bdnz 1b - sync /* Wait for all icbi to complete on bus */ + sync /* Invalidate the TLB entries for the cache */ lis r3,CFG_INIT_RAM_ADDR@h @@ -1020,4 +1018,3 @@ unlock_ram_in_cache: tlbivax 0,r3 isync blr -#endif |