summaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
authorWolfgang Denk <wd@pollux.denx.de>2006-07-05 10:03:52 +0200
committerWolfgang Denk <wd@pollux.denx.de>2006-07-05 10:03:52 +0200
commit0095b787fe97a43cab575e7383ef681ecfb765f2 (patch)
treebd41cc2589621cf90149832d6cd7046eca7ed91e /cpu
parent3f7a63e6a34c5b435864c860c1563117e45d1c35 (diff)
parentce05de295032c50e5855b11c72fe18562a872cc9 (diff)
downloadu-boot-imx-0095b787fe97a43cab575e7383ef681ecfb765f2.zip
u-boot-imx-0095b787fe97a43cab575e7383ef681ecfb765f2.tar.gz
u-boot-imx-0095b787fe97a43cab575e7383ef681ecfb765f2.tar.bz2
Merge with /home/m8/git/u-boot
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ppc4xx/405gp_pci.c13
-rw-r--r--cpu/ppc4xx/cpu.c6
2 files changed, 17 insertions, 2 deletions
diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c
index 0ccb3d8..cf5eccb 100644
--- a/cpu/ppc4xx/405gp_pci.c
+++ b/cpu/ppc4xx/405gp_pci.c
@@ -465,17 +465,30 @@ void pci_440_init (struct pci_controller *hose)
hose->first_busno = 0;
hose->last_busno = 0xff;
+ /* PCI I/O space */
pci_set_region(hose->regions + reg_num++,
0x00000000,
PCIX0_IOBASE,
0x10000,
PCI_REGION_IO);
+ /* PCI memory space */
pci_set_region(hose->regions + reg_num++,
CFG_PCI_TARGBASE,
CFG_PCI_MEMBASE,
0x10000000,
PCI_REGION_MEM );
+
+#if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \
+ defined(CONFIG_PCI_SYS_MEM_SIZE)
+ /* System memory space */
+ pci_set_region(hose->regions + reg_num++,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ CONFIG_PCI_SYS_MEM_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY );
+#endif
+
hose->region_count = reg_num;
pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index 6a84b09..71303bc 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -253,11 +253,13 @@ int checkcpu (void)
break;
case PVR_440SPe_RA:
- puts("SPe 3GA533C");
+ puts("SPe Rev. A");
break;
+
case PVR_440SPe_RB:
- puts("SPe 3GB533C");
+ puts("SPe Rev. B");
break;
+
default:
printf (" UNKNOWN (PVR=%08x)", pvr);
break;