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author | Terry Lv <r65388@freescale.com> | 2009-06-24 11:31:38 +0800 |
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committer | Fred Fan <r01011@freescale.com> | 2009-09-10 17:02:19 +0800 |
commit | 23b6527003ca6a12d7872e9e552160041d8b6285 (patch) | |
tree | 9abe3d5483436632fceb0cfcc51c64c9b443dc67 /cpu | |
parent | c6e205a9fde82e69608850c24686cc972cf258f1 (diff) | |
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ENGR00113611: Add FEC support for BBG2.
Add FEC support for BBG2.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/arm_cortexa8/mx51/generic.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/cpu/arm_cortexa8/mx51/generic.c b/cpu/arm_cortexa8/mx51/generic.c index ef8ef98..6f928f6 100644 --- a/cpu/arm_cortexa8/mx51/generic.c +++ b/cpu/arm_cortexa8/mx51/generic.c @@ -25,6 +25,7 @@ #include <common.h> #include <asm/arch/mx51.h> +#include <asm/errno.h> #include "crm_regs.h" enum pll_clocks { @@ -203,6 +204,10 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return __get_uart_clk(); case MXC_CSPI_CLK: return __get_cspi_clk(); + case MXC_FEC_CLK: + return __decode_pll(PLL1_CLK, CONFIG_MX51_HCLK_FREQ); + default: + break; } return -1; } @@ -233,3 +238,23 @@ int print_cpuinfo(void) return 0; } #endif + +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ + #if defined(CONFIG_MXC_FEC) + extern int mxc_fec_initialize(bd_t *bis); + #endif + +int cpu_eth_init(bd_t *bis) +{ + int rc = -ENODEV; + +#if defined(CONFIG_MXC_FEC) + rc = mxc_fec_initialize(bis); +#endif + + return rc; +} + |