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authorMahesh Mahadevan <r9aadq@freescale.com>2011-11-03 08:22:55 -0500
committerMahesh Mahadevan <r9aadq@freescale.com>2011-11-03 08:22:55 -0500
commitad856cbcbd8b9cf11a23ad1ca0343c69066482f7 (patch)
tree6bc4482114c7ad7ff9b810d3c6f372ceb1d68fe2 /cpu
parentc41f1c6b8cb136037e1cc89cdca671c9a53847bd (diff)
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ENGR00161373 Move the MAC address read from fuse code to MX6 SoC file
Move the code to read the mac address from the fuse to SoC file and out of the board file Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm_cortexa8/mx6/generic.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c
index 3ffc420..019a3f3 100644
--- a/cpu/arm_cortexa8/mx6/generic.c
+++ b/cpu/arm_cortexa8/mx6/generic.c
@@ -33,6 +33,9 @@
#ifdef CONFIG_ARCH_CPU_INIT
#include <asm/cache-cp15.h>
#endif
+#ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
+#include <asm/arch/regs-ocotp.h>
+#endif
enum pll_clocks {
CPU_PLL1, /* System PLL */
@@ -527,8 +530,6 @@ int clk_info(u32 clk_type)
return 0;
}
-
-
static int config_pll_clk(enum pll_clocks pll, u32 divider)
{
u32 ccsr = readl(CCM_BASE_ADDR + CLKCTL_CCSR);
@@ -737,6 +738,24 @@ int print_cpuinfo(void)
extern int mxc_fec_initialize(bd_t *bis);
extern void mxc_fec_set_mac_from_env(char *mac_addr);
void enet_board_init(void);
+#ifdef CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
+int fec_get_mac_addr(unsigned char *mac)
+{
+ unsigned int value;
+
+ value = readl(OCOTP_BASE_ADDR + HW_OCOTP_MACn(0));
+ mac[5] = value & 0xff;
+ mac[4] = (value >> 8) & 0xff;
+ mac[3] = (value >> 16) & 0xff;
+ mac[2] = (value >> 24) & 0xff;
+ value = readl(OCOTP_BASE_ADDR + HW_OCOTP_MACn(1));
+ mac[1] = value & 0xff;
+ mac[0] = (value >> 8) & 0xff;
+
+ return 0;
+}
+#endif
+
#endif
int cpu_eth_init(bd_t *bis)