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author | Michal Simek <monstr@monstr.eu> | 2007-05-07 19:12:43 +0200 |
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committer | Michal Simek <monstr@monstr.eu> | 2007-05-07 19:12:43 +0200 |
commit | fb7c2dbef02c9f6f8d7b04ec4c2bfb91418b9c01 (patch) | |
tree | 613782e94bacc9e87cb774555ce143fbddefb8d6 /cpu | |
parent | 42efed6130c8fcf7da881385b5427065d2801757 (diff) | |
download | u-boot-imx-fb7c2dbef02c9f6f8d7b04ec4c2bfb91418b9c01.zip u-boot-imx-fb7c2dbef02c9f6f8d7b04ec4c2bfb91418b9c01.tar.gz u-boot-imx-fb7c2dbef02c9f6f8d7b04ec4c2bfb91418b9c01.tar.bz2 |
fix: clean interrupt
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/microblaze/Makefile | 3 | ||||
-rw-r--r-- | cpu/microblaze/interrupts.c | 13 |
2 files changed, 13 insertions, 3 deletions
diff --git a/cpu/microblaze/Makefile b/cpu/microblaze/Makefile index db1afa5..b7be5e1 100644 --- a/cpu/microblaze/Makefile +++ b/cpu/microblaze/Makefile @@ -26,7 +26,8 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a START = start.o -SOBJS = dcache.o icache.o irq.o disable_int.o enable_int.o +#SOBJS = dcache.o icache.o irq.o disable_int.o enable_int.o +SOBJS = dcache.o icache.o irq.o COBJS = cpu.o interrupts.o cache.o exception.o timer.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c index 115e58d..c0c92ec 100644 --- a/cpu/microblaze/interrupts.c +++ b/cpu/microblaze/interrupts.c @@ -36,12 +36,14 @@ extern void microblaze_enable_interrupts (void); void enable_interrupts (void) { - microblaze_enable_interrupts (); + __asm__ __volatile__ ("msrset r0, 0x2"); + //microblaze_enable_interrupts (); } int disable_interrupts (void) { - microblaze_disable_interrupts (); + __asm__ __volatile__ ("msrclr r0, 0x2"); + //microblaze_disable_interrupts (); return 0; } @@ -49,6 +51,10 @@ int disable_interrupts (void) #ifdef CFG_TIMER_0 extern void timer_init (void); #endif +#ifdef CFG_FSL_2 +extern void fsl_init2 (void); +#endif + static struct irq_action vecs[CFG_INTC_0_NUM]; @@ -141,6 +147,9 @@ int interrupts_init (void) #ifdef CFG_TIMER_0 timer_init (); #endif +#ifdef CFG_FSL_2 + fsl_init2 (); +#endif enable_interrupts (); return 0; } |