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authorDave Liu <daveliu@freescale.com>2007-06-25 10:41:56 +0800
committerKim Phillips <kim.phillips@freescale.com>2007-08-10 01:12:03 -0500
commit9be39a67c9f8fef7107f5df09d673005f04d0963 (patch)
tree79b4dd35873605ea93f34b8113d527988919f270 /cpu
parentff9658d7049bf8c8e8e0a05dbe5e9f7e91aa5a5d (diff)
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mpc83xx: Add support for the display of reset status
83xx processor family has many reset sources, such as power on reset, software hard reset, software soft reset, JTAG, bus monitor, software watchdog, check stop reset, external hard reset, external software reset. sometimes, to figure out the fault of system, we need to know the cause of reset early before the prompt of u-boot present. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc83xx/cpu_init.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 53a5f59..7224979 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -257,3 +257,39 @@ int cpu_init_r (void)
#endif
return 0;
}
+
+/*
+ * Figure out the cause of the reset
+ */
+int prt_83xx_rsr(void)
+{
+ static struct {
+ ulong mask;
+ char *desc;
+ } bits[] = {
+ {
+ RSR_SWSR, "Software Soft"}, {
+ RSR_SWHR, "Software Hard"}, {
+ RSR_JSRS, "JTAG Soft"}, {
+ RSR_CSHR, "Check Stop"}, {
+ RSR_SWRS, "Software Watchdog"}, {
+ RSR_BMRS, "Bus Monitor"}, {
+ RSR_SRS, "External/Internal Soft"}, {
+ RSR_HRS, "External/Internal Hard"}
+ };
+ static int n = sizeof bits / sizeof bits[0];
+ ulong rsr = gd->reset_status;
+ int i;
+ char *sep;
+
+ puts("Reset Status:");
+
+ sep = " ";
+ for (i = 0; i < n; i++)
+ if (rsr & bits[i].mask) {
+ printf("%s%s", sep, bits[i].desc);
+ sep = ", ";
+ }
+ puts("\n\n");
+ return 0;
+}