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| author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-11-15 10:03:45 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-12-17 10:35:02 +0100 |
| commit | 9570bcd87f4db255514f43b6701746c412f8fef0 (patch) | |
| tree | 4fc63ab8f3992aac0deb0585a948ecc1e4963e93 /cpu | |
| parent | 09ea0de03dcc3ee7af045b0b572227bda2c1c918 (diff) | |
| download | u-boot-imx-9570bcd87f4db255514f43b6701746c412f8fef0.zip u-boot-imx-9570bcd87f4db255514f43b6701746c412f8fef0.tar.gz u-boot-imx-9570bcd87f4db255514f43b6701746c412f8fef0.tar.bz2 | |
AVR32: Fix wrong pin setup for USART3
As reported by Gerhard Berghofer:
in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18
instead of PB18 and PB19.
which is obviously correct. There's currently no code that uses
USART3, but custom boards may run into problems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/at32ap/at32ap700x/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 2d53726..859124a 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -74,8 +74,8 @@ void gpio_enable_usart2(void) void gpio_enable_usart3(void) { + gpio_select_periph_B(GPIO_PIN_PB17, 0); gpio_select_periph_B(GPIO_PIN_PB18, 0); - gpio_select_periph_B(GPIO_PIN_PB19, 0); } #endif |