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| author | Ladislav Michl <ladis@linux-mips.org> | 2009-03-30 18:58:41 +0200 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-03-30 18:58:41 +0200 |
| commit | 81472d893fa565c9d300928a40e504a689bde131 (patch) | |
| tree | c73cd5df42b68a991ff949f8135189d385e422ab /cpu | |
| parent | fe672d60b2a8c9e803596ba4533fa1776015551d (diff) | |
| download | u-boot-imx-81472d893fa565c9d300928a40e504a689bde131.zip u-boot-imx-81472d893fa565c9d300928a40e504a689bde131.tar.gz u-boot-imx-81472d893fa565c9d300928a40e504a689bde131.tar.bz2 | |
OMAP: rename timer divisor
Divisor field is called PTV not PVT.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm1136/omap24xx/interrupts.c | 2 | ||||
| -rw-r--r-- | cpu/arm925t/interrupts.c | 2 | ||||
| -rw-r--r-- | cpu/arm926ejs/omap/timer.c | 2 | ||||
| -rw-r--r-- | cpu/arm_cortexa8/omap3/interrupts.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/cpu/arm1136/omap24xx/interrupts.c b/cpu/arm1136/omap24xx/interrupts.c index fb02a49..6be1262 100644 --- a/cpu/arm1136/omap24xx/interrupts.c +++ b/cpu/arm1136/omap24xx/interrupts.c @@ -49,7 +49,7 @@ int interrupt_init (void) /* Start the counter ticking up */ *((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL; /* reload value on overflow*/ - val = (CONFIG_SYS_PVT << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ + val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0; /* mask to enable timer*/ *((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */ reset_timer_masked(); /* init the timestamp and lastinc value */ diff --git a/cpu/arm925t/interrupts.c b/cpu/arm925t/interrupts.c index ce3c4ad..361047b 100644 --- a/cpu/arm925t/interrupts.c +++ b/cpu/arm925t/interrupts.c @@ -51,7 +51,7 @@ int interrupt_init (void) /* Start the decrementer ticking down from 0xffffffff */ *((int32_t *) (CONFIG_SYS_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL; - val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PVT << MPUTIM_PTV_BIT); + val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PTV << MPUTIM_PTV_BIT); *((int32_t *) (CONFIG_SYS_TIMERBASE + CNTL_TIMER)) = val; /* init the timestamp and lastdec value */ diff --git a/cpu/arm926ejs/omap/timer.c b/cpu/arm926ejs/omap/timer.c index 49e74ab..bedc2e7 100644 --- a/cpu/arm926ejs/omap/timer.c +++ b/cpu/arm926ejs/omap/timer.c @@ -52,7 +52,7 @@ int timer_init (void) /* Start the decrementer ticking down from 0xffffffff */ *((int32_t *) (CONFIG_SYS_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL; - val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PVT << MPUTIM_PTV_BIT); + val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PTV << MPUTIM_PTV_BIT); *((int32_t *) (CONFIG_SYS_TIMERBASE + CNTL_TIMER)) = val; /* init the timestamp and lastdec value */ diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/interrupts.c index 9e9817d..5d9c4e3 100644 --- a/cpu/arm_cortexa8/omap3/interrupts.c +++ b/cpu/arm_cortexa8/omap3/interrupts.c @@ -175,7 +175,7 @@ int interrupt_init(void) /* start the counter ticking up, reload value on overflow */ writel(TIMER_LOAD_VAL, &timer_base->tldr); /* enable timer */ - writel((CONFIG_SYS_PVT << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, + writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, &timer_base->tclr); reset_timer_masked(); /* init the timestamp and lastinc value */ |