diff options
| author | wdenk <wdenk> | 2002-11-10 22:06:23 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2002-11-10 22:06:23 +0000 |
| commit | 7f6c2cbc2bc0721c41bb776242c0b18ec70328e4 (patch) | |
| tree | 908cb91c8a9d3dec906264120a98fdb06c2ca52a /cpu | |
| parent | 2a3cb0207614427d301a4a6f8041267cada14bd8 (diff) | |
| download | u-boot-imx-7f6c2cbc2bc0721c41bb776242c0b18ec70328e4.zip u-boot-imx-7f6c2cbc2bc0721c41bb776242c0b18ec70328e4.tar.gz u-boot-imx-7f6c2cbc2bc0721c41bb776242c0b18ec70328e4.tar.bz2 | |
* Vince Husovsky, 7 Nov 2002:
Add "-n" to linker options to get rid of "Not enough room for
program headers" problem
* Patch by David Müller, 05 Nov 2002
Rename CONFIG_PLL_INPUT_FREQ to CONFIG_SYS_CLK_FREQ
so we can use an already existing name
* Patch by Pierre Aubert, 05 Nov 2002
Hardware related improvements in FDC boot code
* Patch by Holger Schurig, 5 Nov 2002:
Make the PXA really change it's frequency
* Patch by Pierre Aubert, 05 Nov 2002
Add support for slave serial Spartan 2 FPGAs
* Fix uninitialized memory (MAC address) in 8xx SCC/FEC ethernet
drivers
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm920t/speed.c | 4 | ||||
| -rw-r--r-- | cpu/mpc8xx/fec.c | 1 | ||||
| -rw-r--r-- | cpu/mpc8xx/scc.c | 1 | ||||
| -rw-r--r-- | cpu/xscale/start.S | 7 |
4 files changed, 10 insertions, 3 deletions
diff --git a/cpu/arm920t/speed.c b/cpu/arm920t/speed.c index 1ee0c1a..4942727 100644 --- a/cpu/arm920t/speed.c +++ b/cpu/arm920t/speed.c @@ -42,7 +42,7 @@ /* ------------------------------------------------------------------------- */ /* NOTE: This describes the proper use of this file. * - * CONFIG_PLL_INPUT_FREQ should be defined as the input frequency of the PLL. + * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL. * * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of * the specified bus in HZ. @@ -64,7 +64,7 @@ static ulong get_PLLCLK(int pllreg) p = ((r & 0x003F0) >> 4) + 2; s = r & 0x3; - return((CONFIG_PLL_INPUT_FREQ * m) / (p << s)); + return((CONFIG_SYS_CLK_FREQ * m) / (p << s)); } /* return FCLK frequency */ diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c index d43dcaa..d2e8408 100644 --- a/cpu/mpc8xx/fec.c +++ b/cpu/mpc8xx/fec.c @@ -76,6 +76,7 @@ int fec_initialize(bd_t *bis) struct eth_device* dev; dev = (struct eth_device*) malloc(sizeof *dev); + memset(dev, 0, sizeof *dev); sprintf(dev->name, "FEC ETHERNET"); dev->iobase = 0; diff --git a/cpu/mpc8xx/scc.c b/cpu/mpc8xx/scc.c index fed03f7..4ff23c3 100644 --- a/cpu/mpc8xx/scc.c +++ b/cpu/mpc8xx/scc.c @@ -75,6 +75,7 @@ int scc_initialize(bd_t *bis) struct eth_device* dev; dev = (struct eth_device*) malloc(sizeof *dev); + memset(dev, 0, sizeof *dev); sprintf(dev->name, "SCC ETHERNET"); dev->iobase = 0; diff --git a/cpu/xscale/start.S b/cpu/xscale/start.S index cc24c30..e63fece 100644 --- a/cpu/xscale/start.S +++ b/cpu/xscale/start.S @@ -175,10 +175,11 @@ OSTIMER_BASE: .word 0x40a00000 #define OIER 0x1C /* Clock Manager Registers */ +#ifdef CFG_CPUSPEED CC_BASE: .word 0x41300000 #define CCCR 0x00 cpuspeed: .word CFG_CPUSPEED - +#endif /* RS: ??? */ .macro CPWAIT mrc p15,0,r0,c2,c0,0 @@ -194,10 +195,14 @@ cpu_init_crit: mov r1, #0x00 str r1, [r0, #ICMR] +#ifdef CFG_CPUSPEED /* set clock speed */ ldr r0, CC_BASE ldr r1, cpuspeed str r1, [r0, #CCCR] + mov r0, #3 + mcr p14, 0, r0, c6, c0, 0 +#endif /* * before relocating, we have to setup RAM timing |