Merge branch 'master' of git://www.denx.de/git/u-boot

34 files changed, 191 insertions, 103 deletions

diff --git a/cpu/arm926ejs/cpu.c b/cpu/arm926ejs/cpu.c
index 722732e..56c6289 100644
--- a/cpu/arm926ejs/cpu.c
+++ b/cpu/arm926ejs/cpu.c
@@ -134,25 +134,52 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	return (0);
 }
 
-void icache_enable (void)
+/* cache_bit must be either C1_IC or C1_DC */
+static void cache_enable(uint32_t cache_bit)
 {
-	ulong reg;
+	uint32_t reg;
 
-	reg = read_p15_c1 ();		/* get control reg. */
-	cp_delay ();
-	write_p15_c1 (reg | C1_IC);
+	reg = read_p15_c1();	/* get control reg. */
+	cp_delay();
+	write_p15_c1(reg | cache_bit);
 }
 
-void icache_disable (void)
+/* cache_bit must be either C1_IC or C1_DC */
+static void cache_disable(uint32_t cache_bit)
 {
-	ulong reg;
+	uint32_t reg;
 
-	reg = read_p15_c1 ();
-	cp_delay ();
-	write_p15_c1 (reg & ~C1_IC);
+	reg = read_p15_c1();
+	cp_delay();
+	write_p15_c1(reg & ~cache_bit);
 }
 
-int icache_status (void)
+void icache_enable(void)
 {
-	return (read_p15_c1 () & C1_IC) != 0;
+	cache_enable(C1_IC);
+}
+
+void icache_disable(void)
+{
+	cache_disable(C1_IC);
+}
+
+int icache_status(void)
+{
+	return (read_p15_c1() & C1_IC) != 0;
+}
+
+void dcache_enable(void)
+{
+	cache_enable(C1_DC);
+}
+
+void dcache_disable(void)
+{
+	cache_disable(C1_DC);
+}
+
+int dcache_status(void)
+{
+	return (read_p15_c1() & C1_DC) != 0;
 }
diff --git a/cpu/arm926ejs/davinci/ether.c b/cpu/arm926ejs/davinci/ether.c
index d286ec0..5ae035b 100644
--- a/cpu/arm926ejs/davinci/ether.c
+++ b/cpu/arm926ejs/davinci/ether.c
@@ -357,6 +357,8 @@ static int dm644x_eth_hw_init(void)
 			phy.auto_negotiate = gen_auto_negotiate;
 	}
 
+	printf("Ethernet PHY: %s\n", phy.name);
+
 	return(1);
 }
 
diff --git a/cpu/i386/serial.c b/cpu/i386/serial.c
index baf35e5..8b5f8fa 100644
--- a/cpu/i386/serial.c
+++ b/cpu/i386/serial.c
@@ -413,8 +413,8 @@ void kgdb_serial_init(void)
 	 * Init onboard 16550 UART
 	 */
 	outb(0x80, UART1_BASE + UART_LCR);	/* set DLAB bit */
-	outb(bdiv & 0xff), UART1_BASE + UART_DLL);	/* set divisor for 9600 baud */
-	outb(bdiv >> 8), UART1_BASE + UART_DLM);	/* set divisor for 9600 baud */
+	outb((bdiv & 0xff), UART1_BASE + UART_DLL);	/* set divisor for 9600 baud */
+	outb((bdiv >> 8  ), UART1_BASE + UART_DLM);	/* set divisor for 9600 baud */
 	outb(0x03, UART1_BASE + UART_LCR);	/* line control 8 bits no parity */
 	outb(0x00, UART1_BASE + UART_FCR);	/* disable FIFO */
 	outb(0x00, UART1_BASE + UART_MCR);	/* no modem control DTR RTS */
diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c
index a33b956..892096b 100644
--- a/cpu/ixp/npe/npe.c
+++ b/cpu/ixp/npe/npe.c
@@ -67,7 +67,7 @@ static void *npe_alloc(int size)
 		p = npe_alloc_free;
 		npe_alloc_free += size;
 	} else {
-		printf("%s: failed (count=%d, size=%d)!\n", count, size);
+		printf("npe_alloc: failed (count=%d, size=%d)!\n", count, size);
 	}
 	return p;
 }
diff --git a/cpu/mcf5227x/cpu_init.c b/cpu/mcf5227x/cpu_init.c
index 71b053d..cf29559 100644
--- a/cpu/mcf5227x/cpu_init.c
+++ b/cpu/mcf5227x/cpu_init.c
@@ -106,7 +106,7 @@ void cpu_init_f(void)
  */
 int cpu_init_r(void)
 {
-#ifdef CONFIG_MCFTMR
+#ifdef CONFIG_MCFRTC
 	volatile rtc_t *rtc = (volatile rtc_t *)(CFG_MCFRTC_BASE);
 	volatile rtcex_t *rtcex = (volatile rtcex_t *)&rtc->extended;
 	u32 oscillator = CFG_RTC_OSCILLATOR;
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 207a37e..344bcee 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -419,8 +419,7 @@ void cpu_init_f(void)
 	   else is doing it! */
 
 #if defined(CFG_CS0_BASE) & defined(CFG_CS0_SIZE) & \
-    defined(CFG_CS0_WIDTH) & defined(CFG_CS0_RO) & \
-	defined(CFG_CS0_WS)
+    defined(CFG_CS0_WIDTH) & defined(CFG_CS0_WS)
 
 	MCFCSM_CSAR0 = (CFG_CS0_BASE >> 16) & 0xFFFF;
 
@@ -447,8 +446,7 @@ void cpu_init_f(void)
 #endif
 
 #if defined(CFG_CS1_BASE) & defined(CFG_CS1_SIZE) & \
-    defined(CFG_CS1_WIDTH) & defined(CFG_CS1_RO) & \
-	defined(CFG_CS1_WS)
+    defined(CFG_CS1_WIDTH) & defined(CFG_CS1_WS)
 
 	MCFCSM_CSAR1 = (CFG_CS1_BASE >> 16) & 0xFFFF;
 
@@ -476,8 +474,7 @@ void cpu_init_f(void)
 #endif
 
 #if defined(CFG_CS2_BASE) & defined(CFG_CS2_SIZE) & \
-    defined(CFG_CS2_WIDTH) & defined(CFG_CS2_RO) & \
-	defined(CFG_CS2_WS)
+    defined(CFG_CS2_WIDTH) & defined(CFG_CS2_WS)
 
 	MCFCSM_CSAR2 = (CFG_CS2_BASE >> 16) & 0xFFFF;
 
@@ -505,8 +502,7 @@ void cpu_init_f(void)
 #endif
 
 #if defined(CFG_CS3_BASE) & defined(CFG_CS3_SIZE) & \
-    defined(CFG_CS3_WIDTH) & defined(CFG_CS3_RO) & \
-	defined(CFG_CS3_WS)
+    defined(CFG_CS3_WIDTH) & defined(CFG_CS3_WS)
 
 	MCFCSM_CSAR3 = (CFG_CS3_BASE >> 16) & 0xFFFF;
 
diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c
index 5fafcd8..f6edd5b 100644
--- a/cpu/mcf52x2/speed.c
+++ b/cpu/mcf52x2/speed.c
@@ -69,7 +69,7 @@ int get_clocks (void)
 
 	/* Setup PLL */
 	pll->syncr = 0x01080000;
-	while (!(pll->synsr & FMPLL_SYNSR_LOCK)
+	while (!(pll->synsr & FMPLL_SYNSR_LOCK))
 		;
 	pll->syncr = 0x01000000;
 	while (!(pll->synsr & FMPLL_SYNSR_LOCK))
diff --git a/cpu/mcf5445x/config.mk b/cpu/mcf5445x/config.mk
index 88433f2..67efa07 100644
--- a/cpu/mcf5445x/config.mk
+++ b/cpu/mcf5445x/config.mk
@@ -29,3 +29,9 @@ PLATFORM_CPPFLAGS += -mcpu=54455 -fPIC
 else
 PLATFORM_CPPFLAGS += -m5407 -fPIC
 endif
+
+ifneq (,$(findstring -linux-,$(shell $(CC) --version)))
+ifneq (,$(findstring GOT,$(shell $(LD) --help)))
+PLATFORM_LDFLAGS += --got=single
+endif
+endif
diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c
index 585216d..e07748b 100644
--- a/cpu/mcf5445x/cpu_init.c
+++ b/cpu/mcf5445x/cpu_init.c
@@ -110,7 +110,7 @@ void cpu_init_f(void)
  */
 int cpu_init_r(void)
 {
-#ifdef CONFIG_MCFTMR
+#ifdef CONFIG_MCFRTC
 	volatile rtc_t *rtc = (volatile rtc_t *)(CFG_MCFRTC_BASE);
 	volatile rtcex_t *rtcex = (volatile rtcex_t *)&rtc->extended;
 
diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S
index 3241b27..89ec7bc 100644
--- a/cpu/mcf5445x/start.S
+++ b/cpu/mcf5445x/start.S
@@ -253,7 +253,7 @@ clear_bss:
 /* exception code */
 	.globl _fault
 _fault:
-	jmp _fault
+	bra _fault
 	.globl	_exc_handler
 
 _exc_handler:
diff --git a/cpu/mcf547x_8x/config.mk b/cpu/mcf547x_8x/config.mk
index e5f4385..567b281 100644
--- a/cpu/mcf547x_8x/config.mk
+++ b/cpu/mcf547x_8x/config.mk
@@ -29,3 +29,9 @@ PLATFORM_CPPFLAGS += -mcpu=5485 -fPIC
 else
 PLATFORM_CPPFLAGS += -m5407 -fPIC
 endif
+
+ifneq (,$(findstring -linux-,$(shell $(CC) --version)))
+ifneq (,$(findstring GOT,$(shell $(LD) --help)))
+PLATFORM_LDFLAGS += --got=single
+endif
+endif
diff --git a/cpu/mcf547x_8x/start.S b/cpu/mcf547x_8x/start.S
index 8b8708d..87355f9 100644
--- a/cpu/mcf547x_8x/start.S
+++ b/cpu/mcf547x_8x/start.S
@@ -259,7 +259,7 @@ clear_bss:
 /* exception code */
 	.globl _fault
 _fault:
-	jmp _fault
+	bra _fault
 	.globl	_exc_handler
 
 _exc_handler:
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
index 3f04b29..26e88cb 100644
--- a/cpu/microblaze/interrupts.c
+++ b/cpu/microblaze/interrupts.c
@@ -203,7 +203,7 @@ int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 
 	for (i = 0; i < CFG_INTC_0_NUM; i++) {
 		if (act->handler != (interrupt_handler_t*) def_hdlr) {
-			printf ("%02d  %08lx  %08lx  %d\n", i,
+			printf ("%02d  %08x  %08x  %d\n", i,
 				(int)act->handler, (int)act->arg, act->count);
 		}
 		act++;
diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c
index bed77ac..b59f36d 100644
--- a/cpu/mpc512x/cpu.c
+++ b/cpu/mpc512x/cpu.c
@@ -133,8 +133,9 @@ void watchdog_reset (void)
 #ifdef CONFIG_OF_LIBFDT
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
-	char * cpu_path = "/cpus/" OF_CPU;
-	char * eth_path = "/" OF_SOC "/ethernet@2800";
+	char *cpu_path = "/cpus/" OF_CPU;
+	char *eth_path = "/" OF_SOC "/ethernet@2800";
+	char *eth_path_old = "/" OF_SOC_OLD "/ethernet@2800";
 
 	do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
 	do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
@@ -144,5 +145,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 	/* this is so old kernels with old device trees will boot */
 	do_fixup_by_path_u32(blob, "/" OF_SOC_OLD, "bus-frequency", bd->bi_ipsfreq, 0);
+	do_fixup_by_path(blob, eth_path_old, "local-mac-address",
+			bd->bi_enetaddr, 6, 0);
+	do_fixup_by_path(blob, eth_path_old, "address", bd->bi_enetaddr, 6, 0);
 }
 #endif
diff --git a/cpu/mpc512x/fec.c b/cpu/mpc512x/fec.c
index c226a8a..e9df7de 100644
--- a/cpu/mpc512x/fec.c
+++ b/cpu/mpc512x/fec.c
@@ -604,13 +604,10 @@ static int mpc512x_fec_recv (struct eth_device *dev)
 /********************************************************************/
 int mpc512x_fec_initialize (bd_t * bis)
 {
-
-	immap_t *im = (immap_t*) CFG_IMMR;
 	mpc512x_fec_priv *fec;
 	struct eth_device *dev;
 	int i;
 	char *tmp, *end, env_enetaddr[6];
-	uint32 *reg;
 	void * bd;
 
 	fec = (mpc512x_fec_priv *) malloc (sizeof(*fec));
@@ -639,18 +636,6 @@ int mpc512x_fec_initialize (bd_t * bis)
 			fec512x_miiphy_read, fec512x_miiphy_write);
 #endif
 
-	/*
-	 * Initialize I\O pins
-	 */
-	reg = (uint32 *) &(im->io_ctrl.regs[PSC0_0_IDX]);
-
-	for (i = 0; i < 15; i++)
-		reg[i] = IOCTRL_MUX_FEC | 0x00000001;
-
-	im->io_ctrl.regs[SPDIF_TXCLOCK_IDX] = IOCTRL_MUX_FEC | 0x00000001;
-	im->io_ctrl.regs[SPDIF_TX_IDX] = IOCTRL_MUX_FEC | 0x00000001;
-	im->io_ctrl.regs[SPDIF_RX_IDX] = IOCTRL_MUX_FEC | 0x00000001;
-
 	/* Clean up space FEC's MIB and FIFO RAM ...*/
 	memset ((void *) MPC512X_FEC + 0x200, 0x00, 0x400);
 
diff --git a/cpu/mpc512x/speed.c b/cpu/mpc512x/speed.c
index cfaffb5..e62477b 100644
--- a/cpu/mpc512x/speed.c
+++ b/cpu/mpc512x/speed.c
@@ -126,7 +126,7 @@ ulong get_bus_freq (ulong dummy)
 int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	printf("Clock configuration:\n");
-	printf("  CPU:                 %4d MHz\n", gd->cpu_clk / 1000000);
+	printf("  CPU:                 %4ld MHz\n", gd->cpu_clk / 1000000);
 	printf("  Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
 	printf("  IPS Bus:             %4d MHz\n", gd->ips_clk / 1000000);
 	printf("  PCI:                 %4d MHz\n", gd->pci_clk / 1000000);
diff --git a/cpu/mpc83xx/ecc.c b/cpu/mpc83xx/ecc.c
index 6f13094..5137ab6 100644
--- a/cpu/mpc83xx/ecc.c
+++ b/cpu/mpc83xx/ecc.c
@@ -45,7 +45,7 @@ void ecc_print_status(void)
 	       (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0);
 
 	/* Error injection */
-	printf("Memory Data Path Error Injection Mask High/Low: %08lx %08lx\n",
+	printf("Memory Data Path Error Injection Mask High/Low: %08x %08x\n",
 	       ddr->data_err_inject_hi, ddr->data_err_inject_lo);
 
 	printf("Memory Data Path Error Injection Mask ECC:\n");
@@ -75,8 +75,8 @@ void ecc_print_status(void)
 	       (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0);
 
 	/* Capture data */
-	printf("Memory Error Address Capture: 0x%08lx\n", ddr->capture_address);
-	printf("Memory Data Path Read Capture High/Low: %08lx %08lx\n",
+	printf("Memory Error Address Capture: 0x%08x\n", ddr->capture_address);
+	printf("Memory Data Path Read Capture High/Low: %08x %08x\n",
 	       ddr->capture_data_hi, ddr->capture_data_lo);
 	printf("Memory Data Path Read Capture ECC: 0x%02x\n\n",
 	       ddr->capture_ecc & CAPTURE_ECC_ECE);
diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c
index 02c4d05..fda85c1 100644
--- a/cpu/mpc83xx/fdt.c
+++ b/cpu/mpc83xx/fdt.c
@@ -26,6 +26,7 @@
 #include <common.h>
 #include <libfdt.h>
 #include <fdt_support.h>
+#include <asm/processor.h>
 
 extern void ft_qe_setup(void *blob);
 
@@ -33,6 +34,23 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
+	immap_t *immr = (immap_t *)CFG_IMMR;
+	int spridr = immr->sysconf.spridr;
+
+	/*
+	 * delete crypto node if not on an E-processor
+	 * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
+	 * EA revisions got the SEC uprevved to 2.4 but since the default device
+	 * tree contains SEC 2.0 properties we uprev them here.
+	 */
+	if (!IS_E_PROCESSOR(spridr))
+		fdt_fixup_crypto_node(blob, 0);
+	else if (IS_E_PROCESSOR(spridr) &&
+		 (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
+		  SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
+		 REVID_MAJOR(spridr) >= 2)
+		fdt_fixup_crypto_node(blob, 0x0204);
+
 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
 	fdt_fixup_ethernet(blob, bd);
@@ -60,7 +78,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 #ifdef CFG_NS16550
 	do_fixup_by_compat_u32(blob, "ns16550",
-		"clock-frequency", bd->bi_busfreq, 1);
+		"clock-frequency", CFG_NS16550_CLK, 1);
 #endif
 
 	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c
index 16145dd..76c569d 100644
--- a/cpu/mpc83xx/speed.c
+++ b/cpu/mpc83xx/speed.c
@@ -508,7 +508,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 #endif
 	printf("  Local Bus Controller:%4d MHz\n", gd->lbiu_clk / 1000000);
 	printf("  Local Bus:           %4d MHz\n", gd->lclk_clk / 1000000);
-	printf("  DDR:                 %4d MHz\n", gd->mem_clk / 1000000);
+	printf("  DDR:                 %4ld MHz\n", gd->mem_clk / 1000000);
 #if defined(CONFIG_MPC8360)
 	printf("  DDR Secondary:       %4d MHz\n", gd->mem_sec_clk / 1000000);
 #endif
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 0d50549..bde8e56 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -97,7 +97,7 @@ int checkcpu (void)
 	if (cpu) {
 		puts(cpu->name);
 
-		if (svr & 0x80000)
+		if (IS_E_PROCESSOR(svr))
 			puts("E");
 	} else {
 		puts("Unknown");
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 736aef1..4feb751 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -261,37 +261,50 @@ int cpu_init_r(void)
 	volatile uint cache_ctl;
 	uint svr, ver;
 	uint l2srbar;
+	u32 l2siz_field;
 
 	svr = get_svr();
 	ver = SVR_SOC_VER(svr);
 
 	asm("msync;isync");
 	cache_ctl = l2cache->l2ctl;
+	l2siz_field = (cache_ctl >> 28) & 0x3;
 
-	switch (cache_ctl & 0x30000000) {
-	case 0x20000000:
-		if (ver == SVR_8548 || ver == SVR_8548_E ||
-		    ver == SVR_8544 || ver == SVR_8568_E) {
-			puts ("512 KB ");
-			/* set L2E=1, L2I=1, & L2SRAM=0 */
-			cache_ctl = 0xc0000000;
+	switch (l2siz_field) {
+	case 0x0:
+		printf(" unknown size (0x%08x)\n", cache_ctl);
+		return -1;
+		break;
+	case 0x1:
+		if (ver == SVR_8540 || ver == SVR_8560   ||
+		    ver == SVR_8541 || ver == SVR_8541_E ||
+		    ver == SVR_8555 || ver == SVR_8555_E) {
+			puts("128 KB ");
+			/* set L2E=1, L2I=1, & L2BLKSZ=1 (128 Kbyte) */
+			cache_ctl = 0xc4000000;
 		} else {
 			puts("256 KB ");
+			cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
+		}
+		break;
+	case 0x2:
+		if (ver == SVR_8540 || ver == SVR_8560   ||
+		    ver == SVR_8541 || ver == SVR_8541_E ||
+		    ver == SVR_8555 || ver == SVR_8555_E) {
+			puts("256 KB ");
 			/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */
 			cache_ctl = 0xc8000000;
+		} else {
+			puts ("512 KB ");
+			/* set L2E=1, L2I=1, & L2SRAM=0 */
+			cache_ctl = 0xc0000000;
 		}
 		break;
-	case 0x10000000:
-		puts("256 KB ");
-		if (ver == SVR_8544 || ver == SVR_8544_E) {
-			cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
-		}
+	case 0x3:
+		puts("1024 KB ");
+		/* set L2E=1, L2I=1, & L2SRAM=0 */
+		cache_ctl = 0xc0000000;
 		break;
-	case 0x30000000:
-	case 0x00000000:
-	default:
-		printf(" unknown size (0x%08x)\n", cache_ctl);
-		return -1;
 	}
 
 	if (l2cache->l2ctl & 0x80000000) {
diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index 92952e6..c159934 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -29,6 +29,7 @@
 #include <asm/processor.h>
 
 extern void ft_qe_setup(void *blob);
+
 #ifdef CONFIG_MP
 #include "mp.h"
 DECLARE_GLOBAL_DATA_PTR;
@@ -205,6 +206,10 @@ static inline void ft_fixup_cache(void *blob)
 
 void ft_cpu_setup(void *blob, bd_t *bd)
 {
+	/* delete crypto node if not on an E-processor */
+	if (!IS_E_PROCESSOR(get_svr()))
+		fdt_fixup_crypto_node(blob, 0);
+
 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
 	fdt_fixup_ethernet(blob, bd);
@@ -224,7 +229,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 #ifdef CFG_NS16550
 	do_fixup_by_compat_u32(blob, "ns16550",
-		"clock-frequency", bd->bi_busfreq, 1);
+		"clock-frequency", CFG_NS16550_CLK, 1);
 #endif
 
 #ifdef CONFIG_CPM2
diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index a527cf3..554830f 100644
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -50,12 +50,12 @@ int cpu_status(int nr)
 
 	if (nr == id) {
 		table = (u32 *)get_spin_addr();
-		printf("table base @ 0x%08x\n", table);
+		printf("table base @ 0x%p\n", table);
 	} else {
 		table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
 		printf("Running on cpu %d\n", id);
 		printf("\n");
-		printf("table @ 0x%08x:\n", table);
+		printf("table @ 0x%p\n", table);
 		printf("   addr - 0x%08x\n", table[BOOT_ENTRY_ADDR_LOWER]);
 		printf("   pir  - 0x%08x\n", table[BOOT_ENTRY_PIR]);
 		printf("   r3   - 0x%08x\n", table[BOOT_ENTRY_R3_LOWER]);
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 2b5d90e..10fe936 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -188,11 +188,12 @@ _start_e500:
 	lis     r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@h
 	ori     r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@l
 
-	lis     r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h
-	ori     r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l
+	/* Align the mapping to 16MB */
+	lis     r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@h
+	ori     r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@l
 
-	lis     r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
-	ori     r9,r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+	lis     r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+	ori     r9,r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
 
 	mtspr   MAS0,r6
 	mtspr   MAS1,r7
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 7d2b591..ecea5b0 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -214,6 +214,20 @@ get_tbclk(void)
 void
 watchdog_reset(void)
 {
+#if defined(CONFIG_MPC8610)
+	/*
+	 * This actually feed the hard enabled watchdog.
+	 */
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile ccsr_wdt_t *wdt = &immap->im_wdt;
+	volatile ccsr_gur_t *gur = &immap->im_gur;
+	u32 tmp = gur->pordevsr;
+
+	if (tmp & 0x4000) {
+		wdt->swsrr = 0x556c;
+		wdt->swsrr = 0xaa39;
+	}
+#endif
 }
 #endif	/* CONFIG_WATCHDOG */
 
diff --git a/cpu/mpc86xx/fdt.c b/cpu/mpc86xx/fdt.c
index 379306e..80a5c78 100644
--- a/cpu/mpc86xx/fdt.c
+++ b/cpu/mpc86xx/fdt.c
@@ -30,6 +30,6 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 
 #ifdef CFG_NS16550
 	do_fixup_by_compat_u32(blob, "ns16550",
-			       "clock-frequency", bd->bi_busfreq, 1);
+			       "clock-frequency", CFG_NS16550_CLK, 1);
 #endif
 }
diff --git a/cpu/mpc86xx/interrupts.c b/cpu/mpc86xx/interrupts.c
index d9f634f..f16744b 100644
--- a/cpu/mpc86xx/interrupts.c
+++ b/cpu/mpc86xx/interrupts.c
@@ -36,6 +36,7 @@
 #include <command.h>
 #include <asm/processor.h>
 #include <ppc_asm.tmpl>
+#include <watchdog.h>
 
 unsigned long decrementer_count;    /* count value for 1e6/HZ microseconds */
 unsigned long timestamp;
diff --git a/cpu/mpc86xx/traps.c b/cpu/mpc86xx/traps.c
index 5695c3e..13f386d 100644
--- a/cpu/mpc86xx/traps.c
+++ b/cpu/mpc86xx/traps.c
@@ -218,7 +218,7 @@ UnknownException(struct pt_regs *regs)
 	if (debugger_exception_handler && (*debugger_exception_handler) (regs))
 		return;
 #endif
-	printf("UnknownException regs@%x\n", regs);
+	printf("UnknownException regs@%lx\n", (ulong)regs);
 	printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
 	       regs->nip, regs->msr, regs->trap);
 	_exception(0, regs);
diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c
index 8bf8e46..ef91165 100644
--- a/cpu/mpc8xx/video.c
+++ b/cpu/mpc8xx/video.c
@@ -833,10 +833,10 @@ static void video_encoder_init (void)
 
 		puts ("[VIDEO ENCODER] Configuring the encoder...\n");
 
-		printf ("Sending %d bytes (@ %08lX) to I2C 0x%X:\n   ",
+		printf ("Sending %zu bytes (@ %08lX) to I2C 0x%lX:\n   ",
 			sizeof(video_encoder_data),
 			(ulong)video_encoder_data,
-			VIDEO_I2C_ADDR);
+			(ulong)VIDEO_I2C_ADDR);
 		for (i=0; i<sizeof(video_encoder_data); ++i) {
 			printf(" %02X", video_encoder_data[i]);
 		}
diff --git a/cpu/ppc4xx/40x_spd_sdram.c b/cpu/ppc4xx/40x_spd_sdram.c
index 42fd7fb..b21b13e 100644
--- a/cpu/ppc4xx/40x_spd_sdram.c
+++ b/cpu/ppc4xx/40x_spd_sdram.c
@@ -126,9 +126,9 @@ long int spd_sdram(int(read_spd)(uint addr))
 
 	int sdram0_pmit=0x07c00000;
 #ifndef CONFIG_405EP /* not on PPC405EP */
-	int sdram0_besr0=-1;
-	int sdram0_besr1=-1;
-	int sdram0_eccesr=-1;
+	int sdram0_besr0 = -1;
+	int sdram0_besr1 = -1;
+	int sdram0_eccesr = -1;
 #endif
 	int sdram0_ecccfg;
 
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index a27e276..e9940e8 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -1150,50 +1150,50 @@ static void program_codt(unsigned long *dimm_populated,
 	if (dimm_type == SDRAM_DDR2) {
 		codt |= SDRAM_CODT_DQS_1_8_V_DDR2;
 		if ((total_dimm == 1) && (firstSlot == TRUE)) {
-			if (total_rank == 1) {
+			if (total_rank == 1) {	/* PUUU */
 				codt |= CALC_ODT_R(0);
 				modt0 = CALC_ODT_W(0);
 				modt1 = 0x00000000;
 				modt2 = 0x00000000;
 				modt3 = 0x00000000;
 			}
-			if (total_rank == 2) {
+			if (total_rank == 2) {	/* PPUU */
 				codt |= CALC_ODT_R(0) | CALC_ODT_R(1);
-				modt0 = CALC_ODT_W(0);
-				modt1 = CALC_ODT_W(0);
+				modt0 = CALC_ODT_W(0) | CALC_ODT_W(1);
+				modt1 = 0x00000000;
 				modt2 = 0x00000000;
 				modt3 = 0x00000000;
 			}
 		} else if ((total_dimm == 1) && (firstSlot != TRUE)) {
-			if (total_rank == 1) {
+			if (total_rank == 1) {	/* UUPU */
 				codt |= CALC_ODT_R(2);
 				modt0 = 0x00000000;
 				modt1 = 0x00000000;
 				modt2 = CALC_ODT_W(2);
 				modt3 = 0x00000000;
 			}
-			if (total_rank == 2) {
+			if (total_rank == 2) {	/* UUPP */
 				codt |= CALC_ODT_R(2) | CALC_ODT_R(3);
 				modt0 = 0x00000000;
 				modt1 = 0x00000000;
-				modt2 = CALC_ODT_W(2);
-				modt3 = CALC_ODT_W(2);
+				modt2 = CALC_ODT_W(2) | CALC_ODT_W(3);
+				modt3 = 0x00000000;
 			}
 		}
 		if (total_dimm == 2) {
-			if (total_rank == 2) {
+			if (total_rank == 2) {	/* PUPU */
 				codt |= CALC_ODT_R(0) | CALC_ODT_R(2);
 				modt0 = CALC_ODT_RW(2);
 				modt1 = 0x00000000;
 				modt2 = CALC_ODT_RW(0);
 				modt3 = 0x00000000;
 			}
-			if (total_rank == 4) {
+			if (total_rank == 4) {	/* PPPP */
 				codt |= CALC_ODT_R(0) | CALC_ODT_R(1) |
 					CALC_ODT_R(2) | CALC_ODT_R(3);
-				modt0 = CALC_ODT_RW(2);
+				modt0 = CALC_ODT_RW(2) | CALC_ODT_RW(3);
 				modt1 = 0x00000000;
-				modt2 = CALC_ODT_RW(0);
+				modt2 = CALC_ODT_RW(0) | CALC_ODT_RW(1);
 				modt3 = 0x00000000;
 			}
 		}
diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c
index d50a538..9803fcc 100644
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/cpu/ppc4xx/4xx_pcie.c
@@ -25,11 +25,11 @@
 #define DEBUG
 #endif
 
-#include <asm/processor.h>
-#include <asm-ppc/io.h>
-#include <ppc4xx.h>
 #include <common.h>
 #include <pci.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+#include <asm-ppc/io.h>
 
 #if (defined(CONFIG_440SPE) || defined(CONFIG_405EX) ||	\
     defined(CONFIG_460EX) || defined(CONFIG_460GT)) && \
diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c
index ccc73d5..0323dc5 100644
--- a/cpu/ppc4xx/fdt.c
+++ b/cpu/ppc4xx/fdt.c
@@ -47,8 +47,16 @@ void __ft_board_setup(void *blob, bd_t *bd)
 	val[1] = 0;				/* always 0 */
 	val[2] = gd->bd->bi_flashstart;
 	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
+	if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0) {
+		rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
+					  val, sizeof(val), 1);
+	} else {
+		/*
+		 * Some 405 PPC's have EBC as direct PLB child in the dts
+		 */
+		rc = fdt_find_and_setprop(blob, "/plb/ebc", "ranges",
+					  val, sizeof(val), 1);
+	}
 	if (rc)
 		printf("Unable to update property NOR mapping, err=%s\n",
 		       fdt_strerror(rc));
diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c
index 4495a80..2c86a01 100644
--- a/cpu/pxa/mmc.c
+++ b/cpu/pxa/mmc.c
@@ -535,8 +535,10 @@ static void mmc_decode_csd(uint32_t * resp)
 	mmc_dev.removable = 0;
 	mmc_dev.block_read = mmc_bread;
 
-	printf("Detected: %u blocks of %u bytes (%uMB) ", mmc_dev.lba,
-	       mmc_dev.blksz, mmc_dev.lba * mmc_dev.blksz / (1024 * 1024));
+	printf("Detected: %lu blocks of %lu bytes (%luMB) ",
+		mmc_dev.lba,
+		mmc_dev.blksz,
+		mmc_dev.lba * mmc_dev.blksz / (1024 * 1024));
 }
 
 int