* Patch by Bernhard Kuhn, 28 Nov 2003:

  add support for Coldfire CPU
  add support for Motorola M5272C3 and M5282EVB boards

9 files changed, 981 insertions, 0 deletions

diff --git a/cpu/coldfire/Makefile b/cpu/coldfire/Makefile
new file mode 100644
index 0000000..085d840
--- /dev/null
+++ b/cpu/coldfire/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+# CFLAGS += -DET_DEBUG
+
+LIB	= lib$(CPU).a
+
+START	= 
+OBJS	= kgdb.o serial.o interrupts.o cpu.o speed.o cpu_init.o fec.o
+
+all:	.depend $(START) $(LIB)
+
+$(LIB):	$(OBJS)
+	$(AR) crv $@ $(OBJS) kgdb.o
+
+#########################################################################
+
+.depend:	Makefile $(START:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/cpu/coldfire/config.mk b/cpu/coldfire/config.mk
new file mode 100644
index 0000000..72b33ce
--- /dev/null
+++ b/cpu/coldfire/config.mk
@@ -0,0 +1,26 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS +=
+
+PLATFORM_CPPFLAGS += -m5200
diff --git a/cpu/coldfire/cpu.c b/cpu/coldfire/cpu.c
new file mode 100644
index 0000000..5ce0639
--- /dev/null
+++ b/cpu/coldfire/cpu.c
@@ -0,0 +1,87 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <command.h>
+#ifdef CONFIG_M5272
+#include <asm/m5272.h>
+#endif
+#ifdef CONFIG_M5282
+#include <asm/m5282.h>
+#endif
+#include <asm/cache.h>
+
+int do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
+	return 0;
+}
+
+unsigned long get_tbclk (void)
+{
+	return CFG_HZ;
+}
+
+int checkcpu (void)
+{
+#ifdef CONFIG_M5272
+	puts ("MOTOROLA Coldfire MCF5272\n");
+#endif
+#ifdef CONFIG_M5282
+	puts ("MOTOROLA Coldfire MCF5282\n");
+#endif
+	return 0;
+}
+
+void do_exception (void)
+{
+	printf ("\n\n*** Unexpected exception ... Reset Board! ***\n");
+	for (;;);
+}
+
+void do_buserror (void)
+{
+	printf ("\n\n*** Bus error ... Reset Board! ***\n");
+	for (;;);
+}
+
+void do_addresserror (void)
+{
+	printf ("\n\n*** Address error ... Reset Board! ***\n");
+	for (;;);
+}
+
+void trap_init (ulong value)
+{
+	extern void buserror_handler (void);
+	extern void addresserror_handler (void);
+	extern void exception_handler (void);
+	unsigned long *vec = 0;
+	int i;
+
+	vec[2] = buserror_handler;
+	vec[3] = addresserror_handler;
+	for (i = 4; i < 256; i++) {
+		vec[i] = exception_handler;
+	}
+}
diff --git a/cpu/coldfire/fec.c b/cpu/coldfire/fec.c
new file mode 100644
index 0000000..53a93c1
--- /dev/null
+++ b/cpu/coldfire/fec.c
@@ -0,0 +1,300 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <commproc.h>
+#include <net.h>
+#include <command.h>
+
+
+
+/**************************************************************
+ *
+ * FEC Ethernet Initialization Routine
+ *
+ *************************************************************/
+
+#define FEC_ECNTRL_ETHER_EN	0x00000002
+#define FEC_ECNTRL_RESET	0x00000001
+
+#define FEC_RCNTRL_BC_REJ	0x00000010
+#define FEC_RCNTRL_PROM		0x00000008
+#define FEC_RCNTRL_MII_MODE	0x00000004
+#define FEC_RCNTRL_DRT		0x00000002
+#define FEC_RCNTRL_LOOP		0x00000001
+
+#define FEC_TCNTRL_FDEN		0x00000004
+#define FEC_TCNTRL_HBC		0x00000002
+#define FEC_TCNTRL_GTS		0x00000001
+
+#define	FEC_RESET_DELAY		50000
+
+
+
+/* Ethernet Transmit and Receive Buffers */
+#define DBUF_LENGTH  1520
+
+#define TX_BUF_CNT 2
+
+#define TOUT_LOOP 100
+
+#define PKT_MAXBUF_SIZE         1518
+#define PKT_MINBUF_SIZE         64
+#define PKT_MAXBLR_SIZE         1520
+
+
+
+#ifdef CONFIG_M5272
+#define FEC_ADDR 0x10000840
+#endif
+#ifdef CONFIG_M5282
+#define FEC_ADDR 0x40001000
+#endif
+
+#undef	ET_DEBUG
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(FEC_ENET)
+
+
+
+static char txbuf[DBUF_LENGTH];
+
+static uint rxIdx;	/* index of the current RX buffer */
+static uint txIdx;	/* index of the current TX buffer */
+
+/*
+  * FEC Ethernet Tx and Rx buffer descriptors allocated at the
+  *  immr->udata_bd address on Dual-Port RAM
+  * Provide for Double Buffering
+  */
+
+typedef volatile struct CommonBufferDescriptor {
+    cbd_t rxbd[PKTBUFSRX];		/* Rx BD */
+    cbd_t txbd[TX_BUF_CNT];		/* Tx BD */
+} RTXBD;
+
+static RTXBD *rtx = 0x380000;
+
+
+int eth_send(volatile void *packet, int length)
+{
+	int j, rc;
+	volatile fec_t *fecp = FEC_ADDR;
+
+	/* section 16.9.23.3
+	 * Wait for ready
+	 */
+	j = 0;
+	while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
+		udelay(1);
+		j++;
+	}
+	if (j>=TOUT_LOOP) {
+		printf("TX not ready\n");
+	}
+
+	rtx->txbd[txIdx].cbd_bufaddr = (uint)packet;
+	rtx->txbd[txIdx].cbd_datlen  = length;
+	rtx->txbd[txIdx].cbd_sc |= BD_ENET_TX_READY | BD_ENET_TX_LAST;
+
+	/* Activate transmit Buffer Descriptor polling */
+	fecp->fec_x_des_active = 0x01000000;	/* Descriptor polling active	*/
+
+	j = 0;
+	while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
+		udelay(1);
+		j++;
+	}
+	if (j>=TOUT_LOOP) {
+		printf("TX timeout\n");
+	}
+#ifdef ET_DEBUG
+	printf("%s[%d] %s: cycles: %d    status: %x  retry cnt: %d\n",
+	__FILE__,__LINE__,__FUNCTION__,j,rtx->txbd[txIdx].cbd_sc,
+	(rtx->txbd[txIdx].cbd_sc & 0x003C)>>2);
+#endif
+	/* return only status bits */;
+	rc = (rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_STATS);
+
+	txIdx = (txIdx + 1) % TX_BUF_CNT;
+
+	return rc;
+}
+
+int eth_rx(void)
+{
+	int length;
+	volatile fec_t *fecp = FEC_ADDR;
+
+   for (;;)
+   {     
+	/* section 16.9.23.2 */
+	if (rtx->rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
+		length = -1;
+		break;     /* nothing received - leave for() loop */
+	}
+
+	length = rtx->rxbd[rxIdx].cbd_datlen;
+
+	if (rtx->rxbd[rxIdx].cbd_sc & 0x003f) {
+#ifdef ET_DEBUG
+		printf("%s[%d] err: %x\n",
+		__FUNCTION__,__LINE__,rtx->rxbd[rxIdx].cbd_sc);
+#endif
+	} else {
+		/* Pass the packet up to the protocol layers. */
+		NetReceive(NetRxPackets[rxIdx], length - 4);
+	}
+
+	/* Give the buffer back to the FEC. */
+	rtx->rxbd[rxIdx].cbd_datlen = 0;
+
+	/* wrap around buffer index when necessary */
+	if ((rxIdx + 1) >= PKTBUFSRX) {
+           rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY);
+	   rxIdx = 0;
+	} else {
+           rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY;
+	   rxIdx++;
+	}
+	
+	/* Try to fill Buffer Descriptors */
+	fecp->fec_r_des_active = 0x01000000;	/* Descriptor polling active	*/
+   }
+
+   return length;
+}
+
+
+int eth_init (bd_t * bd)
+{
+
+	int i;
+	volatile fec_t *fecp = FEC_ADDR;
+	
+	/* Whack a reset.
+	 * A delay is required between a reset of the FEC block and
+	 * initialization of other FEC registers because the reset takes
+	 * some time to complete. If you don't delay, subsequent writes
+	 * to FEC registers might get killed by the reset routine which is
+	 * still in progress.
+	 */
+
+	fecp->fec_ecntrl = FEC_ECNTRL_RESET;
+	for (i = 0;
+	     (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
+	     ++i) {
+		udelay (1);
+	}
+	if (i == FEC_RESET_DELAY) {
+		printf ("FEC_RESET_DELAY timeout\n");
+		return 0;
+	}
+
+	/* We use strictly polling mode only
+	 */
+	fecp->fec_imask = 0;
+	
+	/* Clear any pending interrupt */
+	fecp->fec_ievent = 0xffffffff;
+	
+	/* Set station address	 */
+#define ea bd->bi_enetaddr
+	fecp->fec_addr_low   =	(ea[0] << 24) | (ea[1] << 16) |
+				(ea[2] <<  8) | (ea[3]        ) ;
+	fecp->fec_addr_high  =	(ea[4] << 24) | (ea[5] << 16  ) ;
+#undef ea
+
+	/* Clear multicast address hash table
+	 */
+	fecp->fec_hash_table_high = 0;
+	fecp->fec_hash_table_low  = 0;
+
+	/* Set maximum receive buffer size.
+	 */
+	fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
+
+	/*
+	 * Setup Buffers and Buffer Desriptors
+	 */
+	rxIdx = 0;
+	txIdx = 0;
+
+	/*
+	 * Setup Receiver Buffer Descriptors (13.14.24.18)
+	 * Settings:
+	 *     Empty, Wrap
+	 */
+	for (i = 0; i < PKTBUFSRX; i++) {
+		rtx->rxbd[i].cbd_sc      = BD_ENET_RX_EMPTY;
+		rtx->rxbd[i].cbd_datlen  = 0;	/* Reset */
+		rtx->rxbd[i].cbd_bufaddr = (uint) NetRxPackets[i];
+	}
+	rtx->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
+
+	/*
+	 * Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
+	 * Settings:
+	 *    Last, Tx CRC
+	 */
+	for (i = 0; i < TX_BUF_CNT; i++) {
+	        rtx->txbd[i].cbd_sc      = BD_ENET_TX_LAST | BD_ENET_TX_TC;
+		rtx->txbd[i].cbd_datlen  = 0;	/* Reset */
+		rtx->txbd[i].cbd_bufaddr = (uint) (&txbuf[0]);
+	}
+	rtx->txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
+
+	/* Set receive and transmit descriptor base
+	 */
+	fecp->fec_r_des_start = (unsigned int) (&rtx->rxbd[0]);
+	fecp->fec_x_des_start = (unsigned int) (&rtx->txbd[0]);
+
+	/* Enable MII mode
+	 */
+
+	/* Half duplex mode */
+	fecp->fec_r_cntrl = (PKT_MAXBUF_SIZE<<16) | FEC_RCNTRL_MII_MODE;
+	fecp->fec_r_cntrl = (PKT_MAXBUF_SIZE<<16) | FEC_RCNTRL_MII_MODE;
+	fecp->fec_x_cntrl = 0;
+
+	fecp->fec_mii_speed = 0;
+
+	/* Now enable the transmit and receive processing
+	 */
+	fecp->fec_ecntrl = FEC_ECNTRL_ETHER_EN;
+
+	/* And last, try to fill Rx Buffer Descriptors */
+	fecp->fec_r_des_active = 0x01000000;	/* Descriptor polling active	*/
+
+	return 1;
+}
+
+
+
+void eth_halt(void)
+{
+	volatile fec_t *fecp = FEC_ADDR;
+	fecp->fec_ecntrl = 0;
+}
+
+#endif
diff --git a/cpu/coldfire/fec.h b/cpu/coldfire/fec.h
new file mode 100644
index 0000000..a49417c
--- /dev/null
+++ b/cpu/coldfire/fec.h
@@ -0,0 +1,28 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef	_FEC_H_
+#define	_FEC_H_
+
+
+#endif	/* _FEC_H_ */
diff --git a/cpu/coldfire/interrupts.c b/cpu/coldfire/interrupts.c
new file mode 100644
index 0000000..3861ff1
--- /dev/null
+++ b/cpu/coldfire/interrupts.c
@@ -0,0 +1,127 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#ifdef CONFIG_M5272
+#include <asm/m5272.h>
+#endif
+#ifdef CONFIG_M5282
+#include <asm/m5282.h>
+#endif
+#include <asm/mcftimer.h>
+#include <asm/processor.h>
+#include <commproc.h>
+
+static ulong timestamp;
+static unsigned short lastinc;
+
+void coldfire_timer_init (void)
+{
+	volatile unsigned short *timerp;
+
+	timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE4);
+	timestamp = 0;
+
+#ifdef CONFIG_M5272
+	/* Set up TIMER 4 as poll clock */
+	timerp[MCFTIMER_TMR] = MCFTIMER_TMR_DISABLE;
+	timerp[MCFTIMER_TRR] = lastinc = 0;
+	timerp[MCFTIMER_TMR] = (65 << 8) | MCFTIMER_TMR_CLK1 |
+		MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
+#endif
+
+#ifdef CONFIG_M5282
+	/* Set up TIMER 4 as poll clock */
+	timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
+	timerp[MCFTIMER_PMR] = lastinc = 0;
+	timerp[MCFTIMER_PCSR] =
+		(5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
+#endif
+}
+
+
+void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
+{
+}
+void irq_free_handler (int vec)
+{
+}
+
+int interrupt_init (void)
+{
+	coldfire_timer_init ();
+	return 0;
+}
+
+void enable_interrupts ()
+{
+}
+int disable_interrupts ()
+{
+	return 0;
+}
+
+void set_timer (ulong t)
+{
+	volatile unsigned short *timerp;
+
+	timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE4);
+	timestamp = 0;
+
+#ifdef CONFIG_M5272
+	timerp[MCFTIMER_TRR] = lastinc = 0;
+#endif
+
+#ifdef CONFIG_M5282
+	timerp[MCFTIMER_PMR] = lastinc = 0;
+#endif
+}
+
+ulong get_timer (ulong base)
+{
+	unsigned short now, diff;
+	volatile unsigned short *timerp;
+
+	timerp = (volatile unsigned short *) (MCF_MBAR + MCFTIMER_BASE4);
+
+#ifdef CONFIG_M5272
+	now = timerp[MCFTIMER_TCN];
+	diff = (now - lastinc);
+#endif
+
+#ifdef CONFIG_M5282
+	now = timerp[MCFTIMER_PCNTR];
+	diff = -(now - lastinc);
+#endif
+
+	timestamp += diff;
+	lastinc = now;
+	return timestamp - base;
+}
+
+void wait_ticks (unsigned long ticks)
+{
+	set_timer (0);
+	while (get_timer (0) < ticks);
+}
diff --git a/cpu/coldfire/serial.c b/cpu/coldfire/serial.c
new file mode 100644
index 0000000..a140fe3
--- /dev/null
+++ b/cpu/coldfire/serial.c
@@ -0,0 +1,168 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <commproc.h>
+#include <command.h>
+
+#ifdef CONFIG_M5272
+#include <asm/m5272.h>
+#endif
+#ifdef CONFIG_M5282
+#include <asm/m5282.h>
+#endif
+#include <asm/mcfuart.h>
+
+#define DoubleClock(a) ((double)(MCF_CLK) / 32.0 / (double)(a))
+
+void rs_serial_setbaudrate (int port, int baudrate)
+{
+#ifdef CONFIG_M5272
+	volatile unsigned char *uartp;
+	double clock, fraction;
+
+	if (port == 0)
+		uartp = (volatile unsigned char *) (MCF_MBAR + MCFUART_BASE1);
+	else
+		uartp = (volatile unsigned char *) (MCF_MBAR + MCFUART_BASE2);
+
+	clock = DoubleClock (baudrate);	/* Set baud above */
+
+	fraction = ((clock - (int) clock) * 16.0) + 0.5;
+
+	uartp[MCFUART_UBG1] = (((int) clock >> 8) & 0xff);	/* set msb baud */
+	uartp[MCFUART_UBG2] = ((int) clock & 0xff);	/* set lsb baud */
+	uartp[MCFUART_UFPD] = ((int) fraction & 0xf);	/* set baud fraction adjust */
+#endif
+}
+
+void rs_serial_init (int port, int baudrate)
+{
+	volatile unsigned char *uartp;
+	double clock, fraction;
+
+	/*
+	 *      Reset UART, get it into known state...
+	 */
+	if (port == 0)
+		uartp = (volatile unsigned char *) (MCF_MBAR + MCFUART_BASE1);
+	else
+		uartp = (volatile unsigned char *) (MCF_MBAR + MCFUART_BASE2);
+
+	uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX;	/* reset RX */
+	uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX;	/* reset TX */
+	uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR;	/* reset MR pointer */
+	uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETERR;	/* reset Error pointer */
+
+	/*
+	 * Set port for CONSOLE_BAUD_RATE, 8 data bits, 1 stop bit, no parity.
+	 */
+	uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8;
+	uartp[MCFUART_UMR] = MCFUART_MR2_STOP1;
+
+	rs_serial_setbaudrate (port, baudrate);
+
+	uartp[MCFUART_UCSR] =
+		MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER;
+	uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE;
+
+	return;
+}
+
+
+/****************************************************************************/
+
+/*
+ *	Output a single character, using UART polled mode.
+ *	This is used for console output.
+ */
+
+void rs_put_char (char ch)
+{
+	volatile unsigned char *uartp;
+	int i;
+
+	uartp = (volatile unsigned char *) (MCF_MBAR + MCFUART_BASE1);
+
+	for (i = 0; (i < 0x10000); i++) {
+		if (uartp[MCFUART_USR] & MCFUART_USR_TXREADY)
+			break;
+	}
+	uartp[MCFUART_UTB] = ch;
+	return;
+}
+
+int rs_is_char (void)
+{
+	volatile unsigned char *uartp;
+
+	uartp = (volatile unsigned char *) (MCF_MBAR + MCFUART_BASE1);
+	return ((uartp[MCFUART_USR] & MCFUART_USR_RXREADY) ? 1 : 0);
+}
+
+int rs_get_char (void)
+{
+	volatile unsigned char *uartp;
+
+	uartp = (volatile unsigned char *) (MCF_MBAR + MCFUART_BASE1);
+	return (uartp[MCFUART_URB]);
+}
+
+void serial_setbrg (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	rs_serial_setbaudrate (0, gd->bd->bi_baudrate);
+}
+
+int serial_init (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	rs_serial_init (0, gd->bd->bi_baudrate);
+	return 0;
+}
+
+
+void serial_putc (const char c)
+{
+	if (c == '\n')
+		serial_putc ('\r');
+	rs_put_char (c);
+}
+
+void serial_puts (const char *s)
+{
+	while (*s) {
+		serial_putc (*s++);
+	}
+}
+
+int serial_getc (void)
+{
+	while (!rs_is_char ());
+	return rs_get_char ();
+}
+
+int serial_tstc ()
+{
+	return rs_is_char ();
+}
diff --git a/cpu/coldfire/speed.c b/cpu/coldfire/speed.c
new file mode 100644
index 0000000..0fe0925
--- /dev/null
+++ b/cpu/coldfire/speed.c
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+ulong get_gclk_freq (void)
+{
+	return 0;
+}
+
+ulong get_bus_freq (ulong gclk_freq)
+{
+	return 0;
+}
diff --git a/cpu/coldfire/start.S b/cpu/coldfire/start.S
new file mode 100644
index 0000000..7e02661
--- /dev/null
+++ b/cpu/coldfire/start.S
@@ -0,0 +1,165 @@
+/*
+ *  Copyright (C) 1998	Dan Malek <dmalek@jlc.net>
+ *  Copyright (C) 1999	Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
+ *  Copyright (C) 2000-2003 Wolfgang Denk <wd@denx.de>
+ *  Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include "version.h"
+
+#ifndef  CONFIG_IDENT_STRING
+#define  CONFIG_IDENT_STRING ""
+#endif
+
+#define MCF_MBAR 0x10000000
+#define MEM_BUILTIN_ADDR 0x20000000
+#define MEM_BUILTIN_SIZE 0x1000
+#define DRAM_ADDR 0x0
+#define DRAM_SIZE 0x400000
+
+	.text
+
+        .globl  _start
+_start:
+	nop
+	nop
+	move.w #0x2700,%sr
+
+        move.l  #0, %d0
+        movec   %d0, %VBR
+
+#ifdef CONFIG_M5272
+	move.l  #(MCF_MBAR+1), %d0
+        move.c  %d0, %MBAR
+
+	move.l  #(MEM_BUILTIN_ADDR+1), %d0
+        movec   %d0, %RAMBAR0
+
+	move.l  #0x01000000, %d0                /* Invalidate cache cmd */
+        movec   %d0, %CACR                      /* Invalidate cache */
+        move.l  #0x0000c000, %d0                /* Setup cache mask */
+        movec   %d0, %ACR0                      /* Enable cache */
+        move.l  #0xff00c000, %d0                /* Setup cache mask */
+        movec   %d0, %ACR1                      /* Enable cache */
+        move.l  #0x80000100, %d0                /* Setup cache mask */
+        movec   %d0, %CACR                      /* Enable cache */
+#endif
+
+	move.l	#_sbss,%a0
+	move.l	#_ebss,%d0
+1:
+	clr.l	(%a0)+
+	cmp.l	%a0,%d0
+	bne.s	1b
+
+/*	move.l  #MEM_BUILTIN_ADDR+MEM_BUILTIN_SIZE, %sp */
+	move.l  #DRAM_ADDR+DRAM_SIZE, %sp
+	clr.l %sp@-
+
+	jsr board_init_f
+
+	.globl	exception_handler
+exception_handler:
+	move.w #0x2700,%sr
+	lea %sp@(-60),%sp
+	movem.l %d0-%d7/%a0-%a6,%sp@
+	jsr do_exception
+	movem.l %sp@,%d0-%d7/%a0-%a6
+	lea %sp@(60),%sp
+	rte
+
+	.globl	buserror_handler
+buserror_handler:
+	move.w #0x2700,%sr
+	lea %sp@(-60),%sp
+	movem.l %d0-%d7/%a0-%a6,%sp@
+	jsr do_buserror
+	movem.l %sp@,%d0-%d7/%a0-%a6
+	lea %sp@(60),%sp
+	rte
+
+	.globl	addresserror_handler
+addresserror_handler:
+	move.w #0x2700,%sr
+	lea %sp@(-60),%sp
+	movem.l %d0-%d7/%a0-%a6,%sp@
+	jsr do_buserror
+	movem.l %sp@,%d0-%d7/%a0-%a6
+	lea %sp@(60),%sp
+	rte
+
+	.globl  get_endaddr
+get_endaddr:
+	movel #_end,%d0
+	rts
+
+#ifdef CONFIG_M5272
+	.globl  icache_enable
+icache_enable:
+	move.l  #0x01000000, %d0                /* Invalidate cache cmd */
+        movec   %d0, %CACR                      /* Invalidate cache */
+        move.l  #0x0000c000, %d0                /* Setup cache mask */
+        movec   %d0, %ACR0                      /* Enable cache */
+        move.l  #0xff00c000, %d0                /* Setup cache mask */
+        movec   %d0, %ACR1                      /* Enable cache */
+        move.l  #0x80000100, %d0                /* Setup cache mask */
+        movec   %d0, %CACR                      /* Enable cache */
+	moveq	#1, %d0
+	move.l	%d0, icache_state
+	rts
+
+	.globl  icache_disable
+icache_disable:
+        move.l  #0x00000100, %d0                /* Setup cache mask */
+        movec   %d0, %CACR                      /* Enable cache */
+	clr.l   %d0				/* Setup cache mask */
+        movec   %d0, %ACR0                      /* Enable cache */
+        movec   %d0, %ACR1                      /* Enable cache */
+	moveq	#0, %d0
+	move.l	%d0, icache_state
+	rts
+#endif
+
+#ifdef CONFIG_M5282
+	.globl  icache_enable
+icache_enable:
+	rts
+
+	.globl  icache_disable
+icache_disable:
+	rts
+#endif
+
+	.globl	icache_status
+icache_status:
+	move.l	icache_state, %d0
+	rts
+
+	.data
+icache_state:
+	.long	1
+
+	.globl  version_string
+version_string:
+	.ascii U_BOOT_VERSION
+	.ascii " (", __DATE__, " - ", __TIME__, ")"
+	.ascii CONFIG_IDENT_STRING, "\0"