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| author | Stefan Roese <sr@denx.de> | 2007-07-30 11:04:57 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-07-30 11:04:57 +0200 |
| commit | 27a528fb41433c4c1e2b5d6bd3fd8d78606fc724 (patch) | |
| tree | ea4ac5f7359b7f19b4c1dc01e809763b399f2f2e /cpu | |
| parent | e36220a4baf1f188ba60f17e9d0f043069b1362a (diff) | |
| download | u-boot-imx-27a528fb41433c4c1e2b5d6bd3fd8d78606fc724.zip u-boot-imx-27a528fb41433c4c1e2b5d6bd3fd8d78606fc724.tar.gz u-boot-imx-27a528fb41433c4c1e2b5d6bd3fd8d78606fc724.tar.bz2 | |
ppc4xx: Only print ECC related info when the error bis are set
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu')
| -rwxr-xr-x | cpu/ppc4xx/traps.c | 38 |
1 files changed, 24 insertions, 14 deletions
diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c index eb9420e..2fcce3d 100755 --- a/cpu/ppc4xx/traps.c +++ b/cpu/ppc4xx/traps.c @@ -147,6 +147,8 @@ MachineCheckException(struct pt_regs *regs) unsigned long fixup, val; #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) u32 value2; + int corr_ecc = 0; + int uncorr_ecc = 0; #endif /* Probing PCI using config cycles cause this exception @@ -214,14 +216,22 @@ MachineCheckException(struct pt_regs *regs) printf("DDR0: At least one interrupt active\n"); if (val & 0x40) printf("DDR0: DRAM initialization complete.\n"); - if (val & 0x20) + if (val & 0x20) { printf("DDR0: Multiple uncorrectable ECC events.\n"); - if (val & 0x10) + uncorr_ecc = 1; + } + if (val & 0x10) { printf("DDR0: Single uncorrectable ECC event.\n"); - if (val & 0x08) + uncorr_ecc = 1; + } + if (val & 0x08) { printf("DDR0: Multiple correctable ECC events.\n"); - if (val & 0x04) + corr_ecc = 1; + } + if (val & 0x04) { printf("DDR0: Single correctable ECC event.\n"); + corr_ecc = 1; + } if (val & 0x02) printf("Multiple accesses outside the defined" " physical memory space detected\n"); @@ -252,11 +262,11 @@ MachineCheckException(struct pt_regs *regs) printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2); } mfsdram(DDR0_23, val); - if ( (val >> 16) & 0xff) + if (((val >> 16) & 0xff) && corr_ecc) printf("DDR0: Syndrome for correctable ECC event 0x%x\n", (val >> 16) & 0xff); mfsdram(DDR0_23, val); - if ( (val >> 8) & 0xff) + if (((val >> 8) & 0xff) && uncorr_ecc) printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n", (val >> 8) & 0xff); mfsdram(DDR0_33, val); @@ -264,28 +274,28 @@ MachineCheckException(struct pt_regs *regs) printf("DDR0: Address of command that caused an " "Out-of-Range interrupt %p\n", val); mfsdram(DDR0_34, val); - if (val) + if (val && uncorr_ecc) printf("DDR0: Address of uncorrectable ECC event %p\n", val); mfsdram(DDR0_35, val); - if (val) + if (val && uncorr_ecc) printf("DDR0: Address of uncorrectable ECC event %p\n", val); mfsdram(DDR0_36, val); - if (val) + if (val && uncorr_ecc) printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); mfsdram(DDR0_37, val); - if (val) + if (val && uncorr_ecc) printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); mfsdram(DDR0_38, val); - if (val) + if (val && corr_ecc) printf("DDR0: Address of correctable ECC event %p\n", val); mfsdram(DDR0_39, val); - if (val) + if (val && corr_ecc) printf("DDR0: Address of correctable ECC event %p\n", val); mfsdram(DDR0_40, val); - if (val) + if (val && corr_ecc) printf("DDR0: Data of correctable ECC event 0x%08x\n", val); mfsdram(DDR0_41, val); - if (val) + if (val && corr_ecc) printf("DDR0: Data of correctable ECC event 0x%08x\n", val); #endif /* CONFIG_440EPX */ #endif /* CONFIG_440 */ |