diff options
author | <m8@hekate.semihalf.com> | 2005-08-16 17:34:22 +0200 |
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committer | <m8@hekate.semihalf.com> | 2005-08-16 17:34:22 +0200 |
commit | 22e05df45cc343eda3266312bde676737d9bc70c (patch) | |
tree | 6f2209c6675e79d000e359725872a3ba15262140 /cpu | |
parent | d4f5c72896b6b47cae276f49081a801491be6838 (diff) | |
parent | 98128f389cc318dbd1d597cf8d2d09902cddcb4b (diff) | |
download | u-boot-imx-22e05df45cc343eda3266312bde676737d9bc70c.zip u-boot-imx-22e05df45cc343eda3266312bde676737d9bc70c.tar.gz u-boot-imx-22e05df45cc343eda3266312bde676737d9bc70c.tar.bz2 |
Merge with pollux.denx.org:/home/git/u-boot/.git
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/arm920t/at91rm9200/serial.c | 2 | ||||
-rw-r--r-- | cpu/mips/config.mk | 12 | ||||
-rw-r--r-- | cpu/mpc8xx/speed.c | 2 | ||||
-rw-r--r-- | cpu/ppc4xx/440gx_enet.c | 29 |
4 files changed, 38 insertions, 7 deletions
diff --git a/cpu/arm920t/at91rm9200/serial.c b/cpu/arm920t/at91rm9200/serial.c index b529cfa..a281932 100644 --- a/cpu/arm920t/at91rm9200/serial.c +++ b/cpu/arm920t/at91rm9200/serial.c @@ -56,7 +56,7 @@ void serial_setbrg (void) if ((baudrate = gd->baudrate) <= 0) baudrate = CONFIG_BAUDRATE; /* MASTER_CLOCK/(16 * baudrate) */ - us->US_BRGR = (AT91C_MASTER_CLOCK >> 4)/baudrate; + us->US_BRGR = (AT91C_MASTER_CLOCK >> 4) / (unsigned)baudrate; } int serial_init (void) diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk index 3c9aab8..fd10747 100644 --- a/cpu/mips/config.mk +++ b/cpu/mips/config.mk @@ -24,9 +24,17 @@ v=$(shell \ mips-linux-as --version|grep "GNU assembler"|awk '{print $$3}'|awk -F . '{print $$2}') MIPSFLAGS=$(shell \ if [ "$v" -lt "14" ]; then \ - echo "-mcpu=4kc -EB -mabicalls"; \ + echo "-mcpu=4kc"; \ else \ - echo "-march=4kc -mtune=4kc -Wa,-mips_allow_branch_to_undefined -EB -mabicalls"; \ + echo "-march=4kc -mtune=4kc -Wa,-mips_allow_branch_to_undefined"; \ fi) +ifneq (,$(findstring 4KCle,$(CROSS_COMPILE))) +ENDIANNESS = -EL +else +ENDIANNESS = -EB +endif + +MIPSFLAGS += $(ENDIANNESS) -mabicalls + PLATFORM_CPPFLAGS += $(MIPSFLAGS) diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c index 95003ed..f038316 100644 --- a/cpu/mpc8xx/speed.c +++ b/cpu/mpc8xx/speed.c @@ -25,7 +25,7 @@ #include <mpc8xx.h> #include <asm/processor.h> -#if !defined(CONFIG_8xx_CPUCLK_DEFAULT) || defined(CFG_MEASURE_CPUCLK) +#if !defined(CONFIG_8xx_CPUCLK_DEFAULT) || defined(CFG_MEASURE_CPUCLK) || defined(DEBUG) #define PITC_SHIFT 16 #define PITR_SHIFT 16 diff --git a/cpu/ppc4xx/440gx_enet.c b/cpu/ppc4xx/440gx_enet.c index 68cbf34..d0b6c15 100644 --- a/cpu/ppc4xx/440gx_enet.c +++ b/cpu/ppc4xx/440gx_enet.c @@ -269,7 +269,7 @@ int ppc_440x_eth_setup_bridge(int devnum, bd_t * bis) static int ppc_440x_eth_init (struct eth_device *dev, bd_t * bis) { - int i; + int i, j; unsigned long reg; unsigned long msr; unsigned long speed; @@ -448,7 +448,11 @@ static int ppc_440x_eth_init (struct eth_device *dev, bd_t * bis) * for RGMII mode. */ if ( ((devnum == 2) || (devnum ==3)) && (4 == ethgroup) ) { - miiphy_write (reg, 23, 0x1200); +#if defined(CONFIG_CIS8201_SHORT_ETCH) + miiphy_write (reg, 23, 0x1300); +#else + miiphy_write (reg, 23, 0x1000); +#endif /* * Vitesse VSC8201/Cicada CIS8201 errata: * Interoperability problem with Intel 82547EI phys @@ -567,6 +571,8 @@ static int ppc_440x_eth_init (struct eth_device *dev, bd_t * bis) hw_p->alloc_tx_buf = (mal_desc_t *) malloc ((sizeof (mal_desc_t) * NUM_TX_BUFF) + ((2 * CFG_CACHELINE_SIZE) - 2)); + if (NULL == hw_p->alloc_tx_buf) + return -1; if (((int) hw_p->alloc_tx_buf & CACHELINE_MASK) != 0) { hw_p->tx = (mal_desc_t *) ((int) hw_p->alloc_tx_buf + @@ -580,6 +586,12 @@ static int ppc_440x_eth_init (struct eth_device *dev, bd_t * bis) hw_p->alloc_rx_buf = (mal_desc_t *) malloc ((sizeof (mal_desc_t) * NUM_RX_BUFF) + ((2 * CFG_CACHELINE_SIZE) - 2)); + if (NULL == hw_p->alloc_rx_buf) { + free(hw_p->alloc_tx_buf); + hw_p->alloc_tx_buf = NULL; + return -1; + } + if (((int) hw_p->alloc_rx_buf & CACHELINE_MASK) != 0) { hw_p->rx = (mal_desc_t *) ((int) hw_p->alloc_rx_buf + @@ -593,9 +605,20 @@ static int ppc_440x_eth_init (struct eth_device *dev, bd_t * bis) for (i = 0; i < NUM_TX_BUFF; i++) { hw_p->tx[i].ctrl = 0; hw_p->tx[i].data_len = 0; - if (hw_p->first_init == 0) + if (hw_p->first_init == 0) { hw_p->txbuf_ptr = (char *) malloc (ENET_MAX_MTU_ALIGNED); + if (NULL == hw_p->txbuf_ptr) { + free(hw_p->alloc_rx_buf); + free(hw_p->alloc_tx_buf); + hw_p->alloc_rx_buf = NULL; + hw_p->alloc_tx_buf = NULL; + for(j = 0; j < i; j++) { + free(hw_p->tx[i].data_ptr); + hw_p->tx[i].data_ptr = NULL; + } + } + } hw_p->tx[i].data_ptr = hw_p->txbuf_ptr; if ((NUM_TX_BUFF - 1) == i) hw_p->tx[i].ctrl |= MAL_TX_CTRL_WRAP; |