diff options
| author | Becky Bruce <becky.bruce@freescale.com> | 2008-11-02 18:19:32 -0600 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2008-11-03 11:05:00 -0600 |
| commit | 104992fc541302a6bac74448e01e7fdad20abca0 (patch) | |
| tree | a68f366ecdddfe29ce9a4fc234c959ff7ec20549 /cpu | |
| parent | af5d100e8d5cd49d69d52d20f1181eb06ddb4ddf (diff) | |
| download | u-boot-imx-104992fc541302a6bac74448e01e7fdad20abca0.zip u-boot-imx-104992fc541302a6bac74448e01e7fdad20abca0.tar.gz u-boot-imx-104992fc541302a6bac74448e01e7fdad20abca0.tar.bz2 | |
powerpc 86xx: Handle CCSR relocation earlier
Currently, the CCSR gets relocated while translation is
enabled, meaning we need 2 BAT translations to get to both the
old location and the new location. Also, the DEFAULT
CCSR location has a dependency on the BAT that maps the
FLASH region. Moving the relocation removes this unnecessary
dependency. This makes it easier and more intutive to
modify the board's memory map.
Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same
BAT for CCSR space.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc86xx/start.S | 29 |
1 files changed, 24 insertions, 5 deletions
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 75e4317..b1a23b4 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -219,6 +219,11 @@ boot_warm: sync #endif +#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR) + /* setup ccsrbar now while we're in real mode */ + bl setup_ccsrbar +#endif + /* * Calculate absolute address in FLASH and jump there *------------------------------------------------------*/ @@ -281,10 +286,6 @@ in_flash: bl setup_bats sync -#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR) - /* setup ccsrbar */ - bl setup_ccsrbar -#endif /* run low-level CPU init code (from Flash) */ bl cpu_init_f @@ -365,10 +366,28 @@ invalidate_bats: * early_bats: * * Set up bats needed early on - this is usually the BAT for the - * stack-in-cache and the Flash + * stack-in-cache, the Flash, and CCSR space */ .globl early_bats early_bats: + /* IBAT 3 */ + lis r4, CONFIG_SYS_IBAT3L@h + ori r4, r4, CONFIG_SYS_IBAT3L@l + lis r3, CONFIG_SYS_IBAT3U@h + ori r3, r3, CONFIG_SYS_IBAT3U@l + mtspr IBAT3L, r4 + mtspr IBAT3U, r3 + isync + + /* DBAT 3 */ + lis r4, CONFIG_SYS_DBAT3L@h + ori r4, r4, CONFIG_SYS_DBAT3L@l + lis r3, CONFIG_SYS_DBAT3U@h + ori r3, r3, CONFIG_SYS_DBAT3U@l + mtspr DBAT3L, r4 + mtspr DBAT3U, r3 + isync + /* IBAT 5 */ lis r4, CONFIG_SYS_IBAT5L@h ori r4, r4, CONFIG_SYS_IBAT5L@l |