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authorSammy He <r62914@freescale.com>2010-11-26 22:35:55 +0800
committerSammy He <r62914@freescale.com>2010-11-26 22:38:31 +0800
commitf9c90ac3717b2907487f559f5227a7dab4675063 (patch)
treef2d9624d7a2e7a9893e7653f4a83db459d71713d /cpu
parent3a13770bd01f785ce7e587c398c47436b6fa703f (diff)
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ENGR00134098-1 MX51: Update fastboot usb init seq
Update fastboot usb init seq, and use defined macro for coding. Signed-off-by: Sammy He <r62914@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm_cortexa8/mx51/generic.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/cpu/arm_cortexa8/mx51/generic.c b/cpu/arm_cortexa8/mx51/generic.c
index 7013645..d02bc5f 100644
--- a/cpu/arm_cortexa8/mx51/generic.c
+++ b/cpu/arm_cortexa8/mx51/generic.c
@@ -933,9 +933,11 @@ void set_usboh3_clk(void)
{
unsigned int reg;
- reg = readl(MXC_CCM_CSCMR1);
- reg |= 1 << 22;
+ reg = readl(MXC_CCM_CSCMR1) &
+ ~MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK;
+ reg |= 1 << MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET;
writel(reg, MXC_CCM_CSCMR1);
+
reg = readl(MXC_CCM_CSCDR1);
reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK;
reg &= ~MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK;
@@ -960,9 +962,9 @@ void enable_usboh3_clk(unsigned char enable)
reg = readl(MXC_CCM_CCGR2);
if (enable)
- reg |= 1 << 14;
+ reg |= 1 << MXC_CCM_CCGR2_CG14_OFFSET;
else
- reg &= ~(1 << 14);
+ reg &= ~(1 << MXC_CCM_CCGR2_CG14_OFFSET);
writel(reg, MXC_CCM_CCGR2);
}
@@ -974,9 +976,9 @@ void enable_usb_phy1_clk(unsigned char enable)
reg = readl(MXC_CCM_CCGR2);
if (enable)
- reg |= 1 << 0;
+ reg |= 1 << MXC_CCM_CCGR2_CG0_OFFSET;
else
- reg &= ~(1<<0);
+ reg &= ~(1 << MXC_CCM_CCGR2_CG0_OFFSET);
writel(reg, MXC_CCM_CCGR2);
}