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| author | Huang Shijie <b32955@freescale.com> | 2011-12-28 13:38:48 +0800 |
|---|---|---|
| committer | Huang Shijie <b32955@freescale.com> | 2011-12-28 15:49:05 +0800 |
| commit | b883fc83fad6f1eecfada25c8e3edaddf49b8a9f (patch) | |
| tree | 9779e0cf82f06ea5b48ebd3cce00f8853e283f63 /cpu | |
| parent | e3db9d7f780276c577afd65d5e553fe58f678a56 (diff) | |
| download | u-boot-imx-b883fc83fad6f1eecfada25c8e3edaddf49b8a9f.zip u-boot-imx-b883fc83fad6f1eecfada25c8e3edaddf49b8a9f.tar.gz u-boot-imx-b883fc83fad6f1eecfada25c8e3edaddf49b8a9f.tar.bz2 | |
ENGR00171008 MX6Q/MFGTOOL : disable the workaround for MFGTOOL
Disable the uboot workaround. It will crash the MFGTOOL.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm_cortexa8/mx6/generic.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c index 7a42a5f..44f1a43 100644 --- a/cpu/arm_cortexa8/mx6/generic.c +++ b/cpu/arm_cortexa8/mx6/generic.c @@ -948,6 +948,7 @@ int cpu_eth_init(bd_t *bis) int arch_cpu_init(void) { int val; +#ifndef CONFIG_MFG unsigned int reg; /* Check the flag of SNVS_LPGPR[0], SRC register will not reset @@ -971,6 +972,7 @@ int arch_cpu_init(void) writel(readl(SNVS_BASE_ADDR + SNVS_LPGPR_OFFSET) & (~0x1), SNVS_BASE_ADDR + SNVS_LPGPR_OFFSET); } +#endif icache_enable(); dcache_enable(); |