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authorRanjani Vaidyanathan <ra5478@freescale.com>2011-11-18 15:07:00 -0600
committerAnson Huang <b20788@freescale.com>2011-12-20 20:19:00 +0800
commit9a57b6eacb43d329c6a19872ba18b20f02af16af (patch)
treebc34e8ea477737cd134abc6c27aaf1170b9303cb /cpu
parent3568732ec72b2d792aeb3f780b0d1f32d86f36ec (diff)
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ENGR00162642: Fix bug in setting VDDSOC voltage
Fix incorrect VDDSOC voltage setting in uboot. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm_cortexa8/mx6/generic.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c
index 216308b..bf79613 100644
--- a/cpu/arm_cortexa8/mx6/generic.c
+++ b/cpu/arm_cortexa8/mx6/generic.c
@@ -879,8 +879,8 @@ int arch_cpu_init(void)
/* Increase the VDDSOC to 1.2V */
val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE);
val &= ~BM_ANADIG_REG_CORE_REG2_TRG;
- val |= BF_ANADIG_REG_CORE_REG2_TRG(0x5);
- REG_SET(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE, val);
+ val |= BF_ANADIG_REG_CORE_REG2_TRG(0x14);
+ REG_WR(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE, val);
return 0;
}