summaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
authorScott McNutt <smcnutt@psyent.com>2006-06-08 12:08:12 -0400
committerScott McNutt <smcnutt@psyent.com>2006-06-08 12:08:12 -0400
commit1f6ce8f5ba013b9cfd2b8f9cea051d70f3b1bc43 (patch)
treec3334c350ad666a82f7a00797c8b86d26a6017d1 /cpu
parent3d22d0b89bb3d669e27ff98d15ab013fbe04ee87 (diff)
downloadu-boot-imx-1f6ce8f5ba013b9cfd2b8f9cea051d70f3b1bc43.zip
u-boot-imx-1f6ce8f5ba013b9cfd2b8f9cea051d70f3b1bc43.tar.gz
u-boot-imx-1f6ce8f5ba013b9cfd2b8f9cea051d70f3b1bc43.tar.bz2
Nios II - Add EPCS Controller bootrom work-around
-When booting from an epcs controller, the epcs bootrom may leave the slave select in an asserted state causing soft reset hang. This patch ensures slave select is negated at reset. Patch by Scott McNutt, 08 Jun 2006
Diffstat (limited to 'cpu')
-rw-r--r--cpu/nios2/epcs.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/cpu/nios2/epcs.c b/cpu/nios2/epcs.c
index fd9fd84..414c38c 100644
--- a/cpu/nios2/epcs.c
+++ b/cpu/nios2/epcs.c
@@ -210,6 +210,21 @@ static struct epcs_devinfo_t devinfo[] = {
{ 0, 0, 0, 0, 0, 0 }
};
+int epcs_reset (void)
+{
+ /* When booting from an epcs controller, the epcs bootrom
+ * code may leave the slave select in an asserted state.
+ * This causes two problems: (1) The initial epcs access
+ * will fail -- not a big deal, and (2) a software reset
+ * will cause the bootrom code to hang since it does not
+ * ensure the select is negated prior to first access -- a
+ * big deal. Here we just negate chip select and everything
+ * gets better :-)
+ */
+ epcs_cs (0); /* Negate chip select */
+ return (0);
+}
+
epcs_devinfo_t *epcs_dev_find (void)
{
unsigned char buf[4];