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authorWolfgang Denk <wd@denx.de>2007-12-27 01:52:50 +0100
committerWolfgang Denk <wd@denx.de>2007-12-27 01:52:50 +0100
commit61fb15c516fef5631e305f1976d7b3a679725856 (patch)
tree3b3e66c90349f1b5df7c2a05dd47c11f42eb58bd /cpu/sh4/cache.c
parent6e1bbe6e3edf5f508de89114577ce7b7caa89c8a (diff)
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Fix coding style issues; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu/sh4/cache.c')
-rw-r--r--cpu/sh4/cache.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/cpu/sh4/cache.c b/cpu/sh4/cache.c
index 55acb31..4e744d7 100644
--- a/cpu/sh4/cache.c
+++ b/cpu/sh4/cache.c
@@ -30,36 +30,36 @@
* Jump to P2 area.
* When handling TLB or caches, we need to do it from P2 area.
*/
-#define jump_to_P2() \
- do { \
+#define jump_to_P2() \
+ do { \
unsigned long __dummy; \
- __asm__ __volatile__( \
- "mov.l 1f, %0\n\t" \
- "or %1, %0\n\t" \
- "jmp @%0\n\t" \
- " nop\n\t" \
- ".balign 4\n" \
- "1: .long 2f\n" \
- "2:" \
- : "=&r" (__dummy) \
- : "r" (0x20000000)); \
+ __asm__ __volatile__( \
+ "mov.l 1f, %0\n\t" \
+ "or %1, %0\n\t" \
+ "jmp @%0\n\t" \
+ " nop\n\t" \
+ ".balign 4\n" \
+ "1: .long 2f\n" \
+ "2:" \
+ : "=&r" (__dummy) \
+ : "r" (0x20000000)); \
} while (0)
/*
* Back to P1 area.
*/
-#define back_to_P1() \
- do { \
- unsigned long __dummy; \
- __asm__ __volatile__( \
- "nop;nop;nop;nop;nop;nop;nop\n\t" \
- "mov.l 1f, %0\n\t" \
- "jmp @%0\n\t" \
- " nop\n\t" \
- ".balign 4\n" \
- "1: .long 2f\n" \
- "2:" \
- : "=&r" (__dummy)); \
+#define back_to_P1() \
+ do { \
+ unsigned long __dummy; \
+ __asm__ __volatile__( \
+ "nop;nop;nop;nop;nop;nop;nop\n\t" \
+ "mov.l 1f, %0\n\t" \
+ "jmp @%0\n\t" \
+ " nop\n\t" \
+ ".balign 4\n" \
+ "1: .long 2f\n" \
+ "2:" \
+ : "=&r" (__dummy)); \
} while (0)
#define CACHE_VALID 1