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author | Felix Radensky <felix@embedded-sol.com> | 2010-01-19 21:19:06 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2010-01-21 08:18:37 +0100 |
commit | 33c8c664239f6665b228145d7e5adfa238a300bc (patch) | |
tree | ab107f3b8e81a557358d2b00e531b0a272ce4b3a /cpu/sh3 | |
parent | d98964aaacc5c54cf7d67bb1e5128ed067086dd7 (diff) | |
download | u-boot-imx-33c8c664239f6665b228145d7e5adfa238a300bc.zip u-boot-imx-33c8c664239f6665b228145d7e5adfa238a300bc.tar.gz u-boot-imx-33c8c664239f6665b228145d7e5adfa238a300bc.tar.bz2 |
ppc4xx: Allow setting a single SPD EEPROM address for DDR2 DIMMs
On platforms where SPD EEPROM and another EEPROM have adjacent
I2C addresses SPD_EEPROM_ADDRESS should be defined as a single
element array, otherwise DDR2 setup code would fail with the
following error:
ERROR: Unknown DIMM detected in slot 1
However, fixing SPD_EEPROM_ADDRESS would result in another
error:
ERROR: DIMM's DDR1 and DDR2 type can not be mixed.
This happens because initdram() routine does not explicitly
initialize dimm_populated array. This patch fixes the problem.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/sh3')
0 files changed, 0 insertions, 0 deletions