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| author | Siarhei Siamashka <siarhei.siamashka@gmail.com> | 2010-02-23 23:56:36 -0500 |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2010-03-07 12:36:35 -0600 |
| commit | 041d42e789aba20296ffcde92173f100a9592880 (patch) | |
| tree | 33d1eed4366904e3b454538c95bb945ec95cee8b /cpu/sh3/cpu.c | |
| parent | 7c966a8bdfdab80cafbfed035d7ae6ea6f58f756 (diff) | |
| download | u-boot-imx-041d42e789aba20296ffcde92173f100a9592880.zip u-boot-imx-041d42e789aba20296ffcde92173f100a9592880.tar.gz u-boot-imx-041d42e789aba20296ffcde92173f100a9592880.tar.bz2 | |
OMAP3: workaround for ARM Cortex-A8 erratum 725233
725233: PLD instructions executed with PLD data forwarding
enabled can result in a processor deadlock
This deadlock can happen when NEON load instructions are used together
with cache preload instructions (PLD). The problematic conditions
can be triggered in-the-wild by NEON optimized functions from pixman
library (http://cgit.freedesktop.org/pixman), which perform dynamic
adjustment of prefetch distance.
The workaround disables PLD data forwarding by setting PLD_FWD bit
in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8
errata list.
The deadlock can only happen on r1pX revisions of Cortex-A8 (used in
OMAP34xx/OMAP35xx). Performance impact of the workaround is practically
non-existant.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'cpu/sh3/cpu.c')
0 files changed, 0 insertions, 0 deletions