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author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-08-31 22:48:33 +0900 |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-08-31 22:48:33 +0900 |
commit | 6ad43d0dd86b612895ddc7f480eb6cdfe793adf9 (patch) | |
tree | a6139313961a40af786cdf43dceef92660400750 /cpu/sh2 | |
parent | 0d53a47dc0737b6aa3a39caee21410c169441ae5 (diff) | |
download | u-boot-imx-6ad43d0dd86b612895ddc7f480eb6cdfe793adf9.zip u-boot-imx-6ad43d0dd86b612895ddc7f480eb6cdfe793adf9.tar.gz u-boot-imx-6ad43d0dd86b612895ddc7f480eb6cdfe793adf9.tar.bz2 |
sh: Add support SH2/SH2A which is CPU of Renesas Technology
Add support SH2/SH2A basic function.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'cpu/sh2')
-rw-r--r-- | cpu/sh2/Makefile | 49 | ||||
-rw-r--r-- | cpu/sh2/cache.c | 112 | ||||
-rw-r--r-- | cpu/sh2/config.mk | 26 | ||||
-rw-r--r-- | cpu/sh2/cpu.c | 98 | ||||
-rw-r--r-- | cpu/sh2/interrupts.c | 39 | ||||
-rw-r--r-- | cpu/sh2/start.S | 78 | ||||
-rw-r--r-- | cpu/sh2/time.c | 111 | ||||
-rw-r--r-- | cpu/sh2/watchdog.c | 33 |
8 files changed, 546 insertions, 0 deletions
diff --git a/cpu/sh2/Makefile b/cpu/sh2/Makefile new file mode 100644 index 0000000..50f6720 --- /dev/null +++ b/cpu/sh2/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> +# Copyright (C) 2008 Renesas Solutions Corp. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(CPU).a + +START = start.o +OBJS = cpu.o interrupts.o watchdog.o time.o # cache.o + +all: .depend $(START) $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@ + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/sh2/cache.c b/cpu/sh2/cache.c new file mode 100644 index 0000000..b5c47cf --- /dev/null +++ b/cpu/sh2/cache.c @@ -0,0 +1,112 @@ +/* + * (C) Copyright 2007 + * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> + * + * Copyright (C) 2007, 2008 Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> + * Copyright (C) 2008 Renesas Solutions Corp. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/processor.h> +#include <asm/io.h> + +/* + * Jump to P2 area. + * When handling TLB or caches, we need to do it from P2 area. + */ +#define jump_to_P2() \ +do { \ + unsigned long __dummy; \ + __asm__ __volatile__( \ + "mov.l 1f, %0\n\t" \ + "or %1, %0\n\t" \ + "jmp @%0\n\t" \ + " nop\n\t" \ + ".balign 4\n" \ + "1: .long 2f\n" \ + "2:" \ + : "=&r" (__dummy) \ + : "r" (0x20000000)); \ +} while (0) + +/* + * Back to P1 area. + */ +#define back_to_P1() \ +do { \ + unsigned long __dummy; \ + __asm__ __volatile__( \ + "nop;nop;nop;nop;nop;nop;nop\n\t" \ + "mov.l 1f, %0\n\t" \ + "jmp @%0\n\t" \ + " nop\n\t" \ + ".balign 4\n" \ + "1: .long 2f\n" \ + "2:" \ + : "=&r" (__dummy)); \ +} while (0) + +#define CACHE_VALID 1 +#define CACHE_UPDATED 2 + +static inline void cache_wback_all(void) +{ + unsigned long addr, data, i, j; + + jump_to_P2(); + for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) { + for (j = 0; j < CACHE_OC_NUM_WAYS; j++) { + addr = CACHE_OC_ADDRESS_ARRAY + | (j << CACHE_OC_WAY_SHIFT) + | (i << CACHE_OC_ENTRY_SHIFT); + data = inl(addr); + if (data & CACHE_UPDATED) { + data &= ~CACHE_UPDATED; + outl(data, addr); + } + } + } + back_to_P1(); +} + + +#define CACHE_ENABLE 0 +#define CACHE_DISABLE 1 + +int cache_control(unsigned int cmd) +{ + unsigned long ccr; + + jump_to_P2(); + ccr = inl(CCR); + + if (ccr & CCR_CACHE_ENABLE) + cache_wback_all(); + + if (cmd == CACHE_DISABLE) + outl(CCR_CACHE_STOP, CCR); + else + outl(CCR_CACHE_INIT, CCR); + back_to_P1(); + + return 0; +} diff --git a/cpu/sh2/config.mk b/cpu/sh2/config.mk new file mode 100644 index 0000000..52d5a0f --- /dev/null +++ b/cpu/sh2/config.mk @@ -0,0 +1,26 @@ +# +# (C) Copyright 2007-2008 +# Nobuhiro Iwamatsu <iwamatsu@nigauri.org> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +# +PLATFORM_CPPFLAGS += -m3e -mb +PLATFORM_RELFLAGS += -ffixed-r13 +PLATFORM_LDFLAGS += -EB diff --git a/cpu/sh2/cpu.c b/cpu/sh2/cpu.c new file mode 100644 index 0000000..e0cb047 --- /dev/null +++ b/cpu/sh2/cpu.c @@ -0,0 +1,98 @@ +/* + * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * Copyright (C) 2008 Renesas Solutions Corp. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <asm/processor.h> +#include <asm/io.h> + +#define STBCR4 0xFFFE040C +#define cmt_clock_enable() do {\ + writeb(readb(STBCR4) & ~0x04, STBCR4);\ + } while (0) +#define scif0_enable() do {\ + writeb(readb(STBCR4) & ~0x80, STBCR4);\ + } while (0) + +int checkcpu(void) +{ +#if defined(CONFIG_SH2A) + puts("CPU: SH2A\n"); +#else + puts("CPU: SH2\n"); +#endif + return 0; +} + +int cpu_init(void) +{ + /* SCIF enable */ + scif0_enable(); + /* CMT clock enable */ + cmt_clock_enable() ; + return 0; +} + +int cleanup_before_linux(void) +{ + disable_interrupts(); + return 0; +} + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + disable_interrupts(); + reset_cpu(0); + return 0; +} + +void flush_cache(unsigned long addr, unsigned long size) +{ + +} + +void icache_enable(void) +{ +} + +void icache_disable(void) +{ +} + +int icache_status(void) +{ + return 0; +} + +void dcache_enable(void) +{ +} + +void dcache_disable(void) +{ +} + +int dcache_status(void) +{ + return 0; +} diff --git a/cpu/sh2/interrupts.c b/cpu/sh2/interrupts.c new file mode 100644 index 0000000..fe6ff3a --- /dev/null +++ b/cpu/sh2/interrupts.c @@ -0,0 +1,39 @@ +/* + * Copyright 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * Copyright (C) 2008 Renesas Solutions Corp. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +int interrupt_init(void) +{ + return 0; +} + +void enable_interrupts(void) +{ + +} + +int disable_interrupts(void) +{ + return 0; +} diff --git a/cpu/sh2/start.S b/cpu/sh2/start.S new file mode 100644 index 0000000..c4fa688 --- /dev/null +++ b/cpu/sh2/start.S @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * Copyright (C) 2008 Renesas Solutions Corp. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> + + .text + .align 2 + + .global _start +_start: + .long 0x00000010 /* Ppower ON reset PC*/ + .long 0x00000000 + .long 0x00000010 /* Manual reset PC */ + .long 0x00000000 +_init: + mov.l ._lowlevel_init, r0 +100: bsrf r0 + nop + bsr 1f + nop +1: sts pr, r5 + mov.l ._reloc_dst, r4 + add #(_start-1b), r5 + mov.l ._reloc_dst_end, r6 + +2: mov.l @r5+, r1 + mov.l r1, @r4 + add #4, r4 + cmp/hs r6, r4 + bf 2b + + mov.l ._bss_start, r4 + mov.l ._bss_end, r5 + mov #0, r1 + +3: mov.l r1, @r4 /* bss clear */ + add #4, r4 + cmp/hs r5, r4 + bf 3b + + mov.l ._gd_init, r13 /* global data */ + mov.l ._stack_init, r15 /* stack */ + + mov.l ._sh_generic_init, r0 + jsr @r0 + nop + +loop: + bra loop + + .align 2 + +._lowlevel_init: .long (lowlevel_init - (100b + 4)) +._reloc_dst: .long reloc_dst +._reloc_dst_end: .long reloc_dst_end +._bss_start: .long bss_start +._bss_end: .long bss_end +._gd_init: .long (_start - CFG_GBL_DATA_SIZE) +._stack_init: .long (_start - CFG_GBL_DATA_SIZE - CFG_MALLOC_LEN - 16) +._sh_generic_init: .long sh_generic_init diff --git a/cpu/sh2/time.c b/cpu/sh2/time.c new file mode 100644 index 0000000..d6eb0cb --- /dev/null +++ b/cpu/sh2/time.c @@ -0,0 +1,111 @@ +/* + * Copyright (C) 2007,2008 Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> + * Copyright (C) 2008 Renesas Solutions Corp. + * + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> + +#define CMT_CMCSR_INIT 0x0001 /* PCLK/32 */ +#define CMT_CMCSR_CALIB 0x0000 +#define CMT_MAX_COUNTER (0xFFFFFFFF) +#define CMT_TIMER_RESET (0xFFFF) + +static vu_long cmt0_timer; + +static void cmt_timer_start(unsigned int timer) +{ + writew(readw(CMSTR) | 0x01, CMSTR); +} + +static void cmt_timer_stop(unsigned int timer) +{ + writew(readw(CMSTR) & ~0x01, CMSTR); +} + +int timer_init(void) +{ + cmt0_timer = 0; + /* Divide clock by 32 */ + readw(CMCSR_0); + writew(CMT_CMCSR_INIT, CMCSR_0); + + /* User Device 0 only */ + cmt_timer_stop(0); + set_timer(CMT_TIMER_RESET); + cmt_timer_start(0); + + return 0; +} + +unsigned long long get_ticks(void) +{ + return cmt0_timer; +} + +static vu_long cmcnt; +ulong get_timer(ulong base) +{ + ulong data = readw(CMCNT_0); + + if (data >= cmcnt) + cmcnt = data - cmcnt; + else + cmcnt = (CMT_TIMER_RESET - cmcnt) + data; + + if ((cmt0_timer + cmcnt) > CMT_MAX_COUNTER) + cmt0_timer = ((cmt0_timer + cmcnt) - CMT_MAX_COUNTER); + else + cmt0_timer += cmcnt; + + cmcnt = data; + return cmt0_timer - base; +} + +void set_timer(ulong t) +{ + writew((u16) t, CMCOR_0); +} + +void reset_timer(void) +{ + cmt_timer_stop(0); + set_timer(CMT_TIMER_RESET); + cmt0_timer = 0; + cmt_timer_start(0); +} + +void udelay(unsigned long usec) +{ + unsigned int start = get_timer(0); + + while (get_timer((ulong) start) < (usec * (CFG_HZ / 1000000))) + continue; +} + +unsigned long get_tbclk(void) +{ + return CFG_HZ; +} diff --git a/cpu/sh2/watchdog.c b/cpu/sh2/watchdog.c new file mode 100644 index 0000000..de0254b --- /dev/null +++ b/cpu/sh2/watchdog.c @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhoro@renesas.com> + * Copyright (C) 2008 Renesas Solutions Corp. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> + +int watchdog_init(void) +{ + return 0; +} + +void reset_cpu(unsigned long ignored) +{ + while (1) + ; +} |