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author | Wolfgang Denk <wd@denx.de> | 2008-09-01 00:03:40 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-09-01 00:03:40 +0200 |
commit | de5b094def5d80c4355c0326cfb54b9289f7d609 (patch) | |
tree | e1145f02977d099f9dc51174a1c0cd7c58b8d55d /cpu/sh2/time.c | |
parent | 845842c1e4c465c895cdfcd013e162320d127048 (diff) | |
parent | c75e772a2f061a508bba28ded1b5bea91f0442b0 (diff) | |
download | u-boot-imx-de5b094def5d80c4355c0326cfb54b9289f7d609.zip u-boot-imx-de5b094def5d80c4355c0326cfb54b9289f7d609.tar.gz u-boot-imx-de5b094def5d80c4355c0326cfb54b9289f7d609.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-sh
Diffstat (limited to 'cpu/sh2/time.c')
-rw-r--r-- | cpu/sh2/time.c | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/cpu/sh2/time.c b/cpu/sh2/time.c new file mode 100644 index 0000000..d6eb0cb --- /dev/null +++ b/cpu/sh2/time.c @@ -0,0 +1,111 @@ +/* + * Copyright (C) 2007,2008 Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> + * Copyright (C) 2008 Renesas Solutions Corp. + * + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> + +#define CMT_CMCSR_INIT 0x0001 /* PCLK/32 */ +#define CMT_CMCSR_CALIB 0x0000 +#define CMT_MAX_COUNTER (0xFFFFFFFF) +#define CMT_TIMER_RESET (0xFFFF) + +static vu_long cmt0_timer; + +static void cmt_timer_start(unsigned int timer) +{ + writew(readw(CMSTR) | 0x01, CMSTR); +} + +static void cmt_timer_stop(unsigned int timer) +{ + writew(readw(CMSTR) & ~0x01, CMSTR); +} + +int timer_init(void) +{ + cmt0_timer = 0; + /* Divide clock by 32 */ + readw(CMCSR_0); + writew(CMT_CMCSR_INIT, CMCSR_0); + + /* User Device 0 only */ + cmt_timer_stop(0); + set_timer(CMT_TIMER_RESET); + cmt_timer_start(0); + + return 0; +} + +unsigned long long get_ticks(void) +{ + return cmt0_timer; +} + +static vu_long cmcnt; +ulong get_timer(ulong base) +{ + ulong data = readw(CMCNT_0); + + if (data >= cmcnt) + cmcnt = data - cmcnt; + else + cmcnt = (CMT_TIMER_RESET - cmcnt) + data; + + if ((cmt0_timer + cmcnt) > CMT_MAX_COUNTER) + cmt0_timer = ((cmt0_timer + cmcnt) - CMT_MAX_COUNTER); + else + cmt0_timer += cmcnt; + + cmcnt = data; + return cmt0_timer - base; +} + +void set_timer(ulong t) +{ + writew((u16) t, CMCOR_0); +} + +void reset_timer(void) +{ + cmt_timer_stop(0); + set_timer(CMT_TIMER_RESET); + cmt0_timer = 0; + cmt_timer_start(0); +} + +void udelay(unsigned long usec) +{ + unsigned int start = get_timer(0); + + while (get_timer((ulong) start) < (usec * (CFG_HZ / 1000000))) + continue; +} + +unsigned long get_tbclk(void) +{ + return CFG_HZ; +} |