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authorStefan Roese <sr@denx.de>2008-06-02 14:35:44 +0200
committerStefan Roese <sr@denx.de>2008-06-03 20:21:49 +0200
commit64852d09e06dd6db2b2db2a3c59bc2db176a54d6 (patch)
tree9a55c856efb307be7fd5a95432f0f3c79ce9191c /cpu/sa1100
parent8a24c07ba5da2c72ad1f05e3eb8a463750200c98 (diff)
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ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
This patch consolidates the 405 and 440 parts of the NAND booting code selected via CONFIG_NAND_SPL. Now common code is used to initialize the SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc. Only *after* running from this location, nand_boot() is called. Please note that the initsdram() call is now moved from nand_boot.c to start.S. I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'cpu/sa1100')
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