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authorMarkus Klotzbuecher <mk@denx.de>2006-05-23 10:33:11 +0200
committerMarkus Klotzbuecher <mk@pollux.denx.de>2006-05-23 10:33:11 +0200
commit24e37645e7378b20fa8f20e2996c8fb8e90c70c9 (patch)
tree466a18dd76abda5b0bd08e90922e3261b780474a /cpu/pxa/usb.c
parent3e326ece9eba8184f5d48aa4fb87760a8f6f0f10 (diff)
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More cleanup for the delta board and the generic usb_ohci driver. Added
CFG_USB_BOARD_INIT and CFG_USB_CPU_INIT for enabling board and cpu specific initialization and cleanup hooks respectively.
Diffstat (limited to 'cpu/pxa/usb.c')
-rw-r--r--cpu/pxa/usb.c71
1 files changed, 71 insertions, 0 deletions
diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c
new file mode 100644
index 0000000..e89391c
--- /dev/null
+++ b/cpu/pxa/usb.c
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2006
+ * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/pxa-regs.h>
+
+#ifdef CFG_USB_CPU_INIT
+# ifdef CONFIG_CPU_MONAHANS
+int usb_cpu_init()
+{
+ /* Enable USB host clock. */
+ CKENA |= (CKENA_2_USBHOST | CKENA_20_UDC);
+ udelay(100);
+
+ /* Configure Port 2 for Host (USB Client Registers) */
+ UP2OCR = 0x3000c;
+
+#if 0
+ GPIO2_2 = 0x801; /* USBHPEN - Alt. Fkt. 1 */
+ GPIO3_2 = 0x801; /* USBHPWR - Alt. Fkt. 1 */
+#endif
+
+ UHCHR |= UHCHR_FHR;
+ wait_ms(11);
+ UHCHR &= ~UHCHR_FHR;
+
+ UHCHR |= UHCHR_FSBIR;
+ while (UHCHR & UHCHR_FSBIR)
+ udelay(1);
+
+#if 0
+ UHCHR |= UHCHR_PCPL; /* USBHPEN is active low */
+ UHCHR |= UHCHR_PSPL; /* USBHPWR is active low */
+#endif
+
+ UHCHR &= ~UHCHR_SSEP0;
+ UHCHR &= ~UHCHR_SSEP1;
+ UHCHR &= ~UHCHR_SSE;
+
+ return 0;
+}
+
+int usb_cpu_stop()
+{
+ /* may not want to do this */
+ /* CKENA &= ~(CKENA_2_USBHOST | CKENA_20_UDC); */
+
+ return 0;
+}
+# endif /* CONFIG_CPU_MONAHANS */
+#endif /* CFG_USB_CPU_INIT */