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| author | Markus Klotzbücher <Markus Klotzbümk@pollux.(none)> | 2006-02-07 20:04:48 +0100 |
|---|---|---|
| committer | Markus Klotzbücher <mk@pollux.(none)> | 2006-02-07 20:04:48 +0100 |
| commit | e0269579a5b546b8f4e9ede82dc1cc3fa3796e02 (patch) | |
| tree | 0ac8cf5589a58887a22afd25a4fb4abdc288f643 /cpu/pxa/serial.c | |
| parent | 57cac1fa547fa590fe4b7992619b9f26417014c3 (diff) | |
| download | u-boot-imx-e0269579a5b546b8f4e9ede82dc1cc3fa3796e02.zip u-boot-imx-e0269579a5b546b8f4e9ede82dc1cc3fa3796e02.tar.gz u-boot-imx-e0269579a5b546b8f4e9ede82dc1cc3fa3796e02.tar.bz2 | |
This is the first commit for the u-boot zylonite port. The following has be
done so far:
* created zylonite board dir (based on lubbock)
* extended some - but not all pxa sources and headers for Intel
Monahans support (CONFIG_CPU_MONAHANS)
* created Makefile zylonite target + MAKEALL entry
* added some debug nonsense, remove later, grep for mk@tbd
Status: compiles (eldk-4.0), and can be started with BDI, but runs forever
and doesn't halt at breakpoints. Hmmm...
Diffstat (limited to 'cpu/pxa/serial.c')
| -rw-r--r-- | cpu/pxa/serial.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c index cedebfe..9bf2a7c 100644 --- a/cpu/pxa/serial.c +++ b/cpu/pxa/serial.c @@ -54,7 +54,11 @@ void serial_setbrg (void) hang (); #ifdef CONFIG_FFUART +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_22_FFUART; +#else CKEN |= CKEN6_FFUART; +#endif /* CONFIG_CPU_MONAHANS */ FFIER = 0; /* Disable for now */ FFFCR = 0; /* No fifos enabled */ @@ -68,7 +72,11 @@ void serial_setbrg (void) FFIER = IER_UUE; /* Enable FFUART */ #elif defined(CONFIG_BTUART) +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_21_BTUART; +#else CKEN |= CKEN7_BTUART; +#endif /* CONFIG_CPU_MONAHANS */ BTIER = 0; BTFCR = 0; @@ -82,7 +90,11 @@ void serial_setbrg (void) BTIER = IER_UUE; /* Enable BFUART */ #elif defined(CONFIG_STUART) +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_23_STUART; +#else CKEN |= CKEN5_STUART; +#endif /* CONFIG_CPU_MONAHANS */ STIER = 0; STFCR = 0; |