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| author | Markus Klotzbuecher <mk@denx.de> | 2006-03-24 15:43:16 +0100 |
|---|---|---|
| committer | Markus Klotzbücher <mk@pollux.denx.de> | 2006-03-24 15:43:16 +0100 |
| commit | 2770bcb21c82835a5351176e5b2a9221d7fc8ef9 (patch) | |
| tree | 78edf9afc584e1a76d219bd64d260224a84f0d10 /cpu/ppc4xx | |
| parent | 0b953ffc653fc5ab3d3fa47abf0dd9b8bd0703f5 (diff) | |
| parent | 05d8dce9d07cf4073ea15fbc448c1ce22b6baf0f (diff) | |
| download | u-boot-imx-2770bcb21c82835a5351176e5b2a9221d7fc8ef9.zip u-boot-imx-2770bcb21c82835a5351176e5b2a9221d7fc8ef9.tar.gz u-boot-imx-2770bcb21c82835a5351176e5b2a9221d7fc8ef9.tar.bz2 | |
Merge with http://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu/ppc4xx')
| -rw-r--r-- | cpu/ppc4xx/405gp_pci.c | 2 | ||||
| -rw-r--r-- | cpu/ppc4xx/start.S | 41 |
2 files changed, 19 insertions, 24 deletions
diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c index f6b29e9..947b85e 100644 --- a/cpu/ppc4xx/405gp_pci.c +++ b/cpu/ppc4xx/405gp_pci.c @@ -373,7 +373,7 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev, { unsigned int cmdstat = 0; - pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io); + pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); /* always enable io space on vga boards */ pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 48b430d..948de43 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -340,23 +340,6 @@ _start: mtspr tcr,r0 /* disable all */ mtspr esr,r0 /* clear exception syndrome register */ mtxer r0 /* clear integer exception register */ -#if !defined(CONFIG_440GX) - lis r1,0x0002 /* set CE bit (Critical Exceptions) */ - ori r1,r1,0x1000 /* set ME bit (Machine Exceptions) */ - mtmsr r1 /* change MSR */ -#elif !defined(CONFIG_440EP) && !defined(CONFIG_440GR) - bl __440gx_msr_set - b __440gx_msr_continue - -__440gx_msr_set: - lis r1, 0x0002 /* set CE bit (Critical Exceptions) */ - ori r1,r1,0x1000 /* set ME bit (Machine Exceptions) */ - mtspr srr1,r1 - mflr r1 - mtspr srr0,r1 - rfi -__440gx_msr_continue: -#endif /*----------------------------------------------------------------*/ /* Debug setup -- some (not very good) ice's need an event*/ @@ -458,9 +441,6 @@ __440gx_msr_continue: mtspr esr,r0 /* clear Exception Syndrome Reg */ mttcr r0 /* timer control register */ mtexier r0 /* disable all interrupts */ - addi r4,r0,0x1000 /* set ME bit (Machine Exceptions) */ - oris r4,r4,0x2 /* set CE bit (Critical Exceptions) */ - mtmsr r4 /* change MSR */ addis r4,r0,0xFFFF /* set r4 to 0xFFFFFFFF (status in the */ ori r4,r4,0xFFFF /* dbsr is cleared by setting bits to 1) */ mtdbsr r4 /* clear/reset the dbsr */ @@ -571,9 +551,6 @@ __440gx_msr_continue: mttcr r4 /* clear Timer Control Reg */ mtxer r4 /* clear Fixed-Point Exception Reg */ mtevpr r4 /* clear Exception Vector Prefix Reg */ - addi r4,r0,0x1000 /* set ME bit (Machine Exceptions) */ - oris r4,r4,0x0002 /* set CE bit (Critical Exceptions) */ - mtmsr r4 /* change MSR */ addi r4,r0,(0xFFFF-0x10000) /* set r4 to 0xFFFFFFFF (status in the */ /* dbsr is cleared by setting bits to 1) */ mtdbsr r4 /* clear/reset the dbsr */ @@ -1428,6 +1405,24 @@ trap_init: cmplw 0, r7, r8 blt 4b +#if !defined(CONFIG_440_GX) + addi r7,r0,0x1000 /* set ME bit (Machine Exceptions) */ + oris r7,r7,0x0002 /* set CE bit (Critical Exceptions) */ + mtmsr r7 /* change MSR */ +#else + bl __440gx_msr_set + b __440gx_msr_continue + +__440gx_msr_set: + addi r7,r0,0x1000 /* set ME bit (Machine Exceptions) */ + oris r7,r7,0x0002 /* set CE bit (Critical Exceptions) */ + mtspr srr1,r7 + mflr r7 + mtspr srr0,r7 + rfi +__440gx_msr_continue: +#endif + mtlr r4 /* restore link register */ blr |