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| author | Wolfgang Denk <wd@pollux.denx.de> | 2006-11-27 13:55:31 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2006-11-27 13:55:31 +0100 |
| commit | 3b58d9459081ae33885335c645fc0b865584ae4e (patch) | |
| tree | c3e22d41a406b27864d92a932fb2b4e756b99751 /cpu/ppc4xx | |
| parent | 78d620ebb5871d252270dedfad60c6568993b780 (diff) | |
| parent | 2053283304eeddf250d109e6791eb6fa4cad14f7 (diff) | |
| download | u-boot-imx-3b58d9459081ae33885335c645fc0b865584ae4e.zip u-boot-imx-3b58d9459081ae33885335c645fc0b865584ae4e.tar.gz u-boot-imx-3b58d9459081ae33885335c645fc0b865584ae4e.tar.bz2 | |
Merge with /home/sr/git/u-boot/denx
Diffstat (limited to 'cpu/ppc4xx')
| -rw-r--r-- | cpu/ppc4xx/start.S | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 3fe13da..8e000d3 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -204,6 +204,18 @@ _start_440: mfspr r1,mcsr mtspr mcsr,r1 #endif + + /*----------------------------------------------------------------*/ + /* CCR0 init */ + /*----------------------------------------------------------------*/ + /* Disable store gathering & broadcast, guarantee inst/data + * cache block touch, force load/store alignment + * (see errata 1.12: 440_33) + */ + lis r1,0x0030 /* store gathering & broadcast disable */ + ori r1,r1,0x6000 /* cache touch */ + mtspr ccr0,r1 + /*----------------------------------------------------------------*/ /* Initialize debug */ /*----------------------------------------------------------------*/ @@ -225,17 +237,6 @@ _start_440: mtspr dbsr,r1 /* Clear all valid bits */ skip_debug_init: - /*----------------------------------------------------------------*/ - /* CCR0 init */ - /*----------------------------------------------------------------*/ - /* Disable store gathering & broadcast, guarantee inst/data - * cache block touch, force load/store alignment - * (see errata 1.12: 440_33) - */ - lis r1,0x0030 /* store gathering & broadcast disable */ - ori r1,r1,0x6000 /* cache touch */ - mtspr ccr0,r1 - #if defined (CONFIG_440SPE) /*----------------------------------------------------------------+ | Initialize Core Configuration Reg1. |