diff options
| author | Markus Klotzbuecher <mk@denx.de> | 2007-05-07 14:10:38 +0200 |
|---|---|---|
| committer | Markus Klotzbuecher <mk@pollux.denx.de> | 2007-05-07 14:10:38 +0200 |
| commit | 6ede0c8b69ad1e6b16463ec75a6dccca152c4b17 (patch) | |
| tree | 978dcbd6189998876bb227ae5bbea03000a2f9c5 /cpu/ppc4xx | |
| parent | 61ea75aa07838435ec570ac85a2e3fc038844596 (diff) | |
| parent | ac4cd59d59c9bf3f89cb7a344abf8184d678f562 (diff) | |
| download | u-boot-imx-6ede0c8b69ad1e6b16463ec75a6dccca152c4b17.zip u-boot-imx-6ede0c8b69ad1e6b16463ec75a6dccca152c4b17.tar.gz u-boot-imx-6ede0c8b69ad1e6b16463ec75a6dccca152c4b17.tar.bz2 | |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu/ppc4xx')
| -rw-r--r-- | cpu/ppc4xx/4xx_enet.c | 30 |
1 files changed, 21 insertions, 9 deletions
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index cf56581..1200d02 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -339,29 +339,41 @@ int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis) int ppc_4xx_eth_setup_bridge(int devnum, bd_t * bis) { unsigned long zmiifer=0x0; + unsigned long pfc1; - /* - * Right now only 2*RGMII is supported. Please extend when needed. - * sr - 2006-08-29 - */ - switch (1) { - case 0: + mfsdr(sdr_pfc1, pfc1); + pfc1 &= SDR0_PFC1_SELECT_MASK; + + switch (pfc1) { + case SDR0_PFC1_SELECT_CONFIG_2: /* 1 x GMII port */ out32 (ZMII_FER, 0x00); out32 (RGMII_FER, 0x00000037); bis->bi_phymode[0] = BI_PHYMODE_GMII; bis->bi_phymode[1] = BI_PHYMODE_NONE; break; - case 1: + case SDR0_PFC1_SELECT_CONFIG_4: /* 2 x RGMII ports */ out32 (ZMII_FER, 0x00); out32 (RGMII_FER, 0x00000055); bis->bi_phymode[0] = BI_PHYMODE_RGMII; bis->bi_phymode[1] = BI_PHYMODE_RGMII; break; - case 2: + case SDR0_PFC1_SELECT_CONFIG_6: /* 2 x SMII ports */ - + out32 (ZMII_FER, + ((ZMII_FER_SMII) << ZMII_FER_V(0)) | + ((ZMII_FER_SMII) << ZMII_FER_V(1))); + out32 (RGMII_FER, 0x00000000); + bis->bi_phymode[0] = BI_PHYMODE_SMII; + bis->bi_phymode[1] = BI_PHYMODE_SMII; + break; + case SDR0_PFC1_SELECT_CONFIG_1_2: + /* only 1 x MII supported */ + out32 (ZMII_FER, (ZMII_FER_MII) << ZMII_FER_V(0)); + out32 (RGMII_FER, 0x00000000); + bis->bi_phymode[0] = BI_PHYMODE_MII; + bis->bi_phymode[1] = BI_PHYMODE_NONE; break; default: break; |