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author | Stefan Roese <sr@denx.de> | 2007-07-11 12:16:04 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2007-07-11 12:16:04 +0200 |
commit | 53629f439cc9daba166812749d2cf3102aca7aac (patch) | |
tree | f82264c99a124f2cbfeca96820290c46c88e0ad9 /cpu/ppc4xx | |
parent | 334043f601a90ac53e5ecc846fbb73a1ef38cb1f (diff) | |
parent | 4ef218f6fdf8d747f4589da5252b004e7d2c2876 (diff) | |
download | u-boot-imx-53629f439cc9daba166812749d2cf3102aca7aac.zip u-boot-imx-53629f439cc9daba166812749d2cf3102aca7aac.tar.gz u-boot-imx-53629f439cc9daba166812749d2cf3102aca7aac.tar.bz2 |
Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu/ppc4xx')
-rw-r--r-- | cpu/ppc4xx/44x_spd_ddr.c | 28 | ||||
-rw-r--r-- | cpu/ppc4xx/44x_spd_ddr2.c | 74 | ||||
-rw-r--r-- | cpu/ppc4xx/start.S | 2 |
3 files changed, 62 insertions, 42 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c index e24cd81..8c18d0f 100644 --- a/cpu/ppc4xx/44x_spd_ddr.c +++ b/cpu/ppc4xx/44x_spd_ddr.c @@ -70,6 +70,15 @@ #define ONE_BILLION 1000000000 +/* + * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed + */ +void __spd_ddr_init_hang (void) +{ + hang (); +} +void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))); + /*----------------------------------------------------------------------------- | Memory Controller Options 0 +-----------------------------------------------------------------------------*/ @@ -467,7 +476,7 @@ static void get_spd_info(unsigned long *dimm_populated, if (dimm_found == FALSE) { printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); } } @@ -490,7 +499,7 @@ static void check_mem_type(unsigned long *dimm_populated, dimm_num); printf("Only DDR SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; } } @@ -510,7 +519,7 @@ static void check_volt_type(unsigned long *dimm_populated, if (voltage_type != 0x04) { printf("ERROR: DIMM %lu with unsupported voltage level.\n", dimm_num); - hang(); + spd_ddr_init_hang (); } else { debug("DIMM %lu voltage level supported.\n", dimm_num); } @@ -581,7 +590,7 @@ static void program_cfg0(unsigned long *dimm_populated, printf("WARNING: DIMM with datawidth of %lu bits.\n", data_width); printf("Only DIMMs with 32 or 64 bit datawidths supported.\n"); - hang(); + spd_ddr_init_hang (); } break; } @@ -769,7 +778,7 @@ static void program_tr0(unsigned long *dimm_populated, if ((tcyc_reg & 0x0F) >= 10) { printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n", dimm_num); - hang(); + spd_ddr_init_hang (); } cycle_time_ns_x_10[cas_index] = @@ -849,7 +858,7 @@ static void program_tr0(unsigned long *dimm_populated, printf("ERROR: No supported CAS latency with the installed DIMMs.\n"); printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n"); printf("Make sure the PLB speed is within the supported range.\n"); - hang(); + spd_ddr_init_hang (); } /* @@ -1008,6 +1017,7 @@ static int short_mem_test(void) */ for (i = 0; i < NUMMEMTESTS; i++) { for (j = 0; j < NUMMEMWORDS; j++) { +//printf("bank enabled base:%x\n", &membase[j]); membase[j] = test[i][j]; ppcDcbf((unsigned long)&(membase[j])); } @@ -1160,7 +1170,7 @@ static void program_tr1(void) */ if (window_found == FALSE) { printf("ERROR: Cannot determine a common read delay.\n"); - hang(); + spd_ddr_init_hang (); } /* @@ -1310,7 +1320,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated, printf("ERROR: Unsupported value for the banksize: %d.\n", bank_size_id); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); } switch (num_col_addr) { @@ -1332,7 +1342,7 @@ static unsigned long program_bxcr(unsigned long *dimm_populated, printf("ERROR: Unsupported value for number of " "column addresses: %d.\n", num_col_addr); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); } /* diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index b5c0f53..5fef27b 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -129,6 +129,16 @@ #define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */ #endif +/* + * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed + */ +void __spd_ddr_init_hang (void) +{ + hang (); +} +void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))); + + /* Private Structure Definitions */ /* enum only to ease code for cas latency setting */ @@ -582,7 +592,7 @@ static void get_spd_info(unsigned long *dimm_populated, if (dimm_found == FALSE) { printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); } } @@ -629,42 +639,42 @@ static void check_mem_type(unsigned long *dimm_populated, "slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; case 2: printf("ERROR: EDO DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; case 3: printf("ERROR: Pipelined Nibble DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; case 4: printf("ERROR: SDRAM DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; case 5: printf("ERROR: Multiplexed ROM DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; case 6: printf("ERROR: SGRAM DIMM detected in slot %d.\n", (unsigned int)dimm_num); printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; case 7: debug("DIMM slot %d: DDR1 SDRAM detected\n", dimm_num); @@ -679,7 +689,7 @@ static void check_mem_type(unsigned long *dimm_populated, (unsigned int)dimm_num); printf("Only DDR1 and DDR2 SDRAM DIMMs are supported.\n"); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; } } @@ -689,7 +699,7 @@ static void check_mem_type(unsigned long *dimm_populated, && (dimm_populated[dimm_num] != SDRAM_NONE) && (dimm_populated[dimm_num-1] != dimm_populated[dimm_num])) { printf("ERROR: DIMM's DDR1 and DDR2 type can not be mixed.\n"); - hang(); + spd_ddr_init_hang (); } } } @@ -764,7 +774,7 @@ static void check_frequency(unsigned long *dimm_populated, (unsigned int)(calc_cycle_time*10)); printf("Replace the DIMM, or change DDR frequency via " "strapping bits.\n\n"); - hang(); + spd_ddr_init_hang (); } } } @@ -796,7 +806,7 @@ static void check_rank_number(unsigned long *dimm_populated, "slot %d is not supported.\n", dimm_rank, dimm_num); printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); } else total_rank += dimm_rank; } @@ -805,7 +815,7 @@ static void check_rank_number(unsigned long *dimm_populated, "for all slots.\n", (unsigned int)total_rank); printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS); printf("Remove one of the DIMM modules.\n\n"); - hang(); + spd_ddr_init_hang (); } } } @@ -830,28 +840,28 @@ static void check_voltage_type(unsigned long *dimm_populated, printf("This DIMM is 5.0 Volt/TTL.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - hang(); + spd_ddr_init_hang (); break; case 0x01: printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("This DIMM is LVTTL.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - hang(); + spd_ddr_init_hang (); break; case 0x02: printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("This DIMM is 1.5 Volt.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - hang(); + spd_ddr_init_hang (); break; case 0x03: printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("This DIMM is 3.3 Volt/TTL.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - hang(); + spd_ddr_init_hang (); break; case 0x04: /* 2.5 Voltage only for DDR1 */ @@ -863,7 +873,7 @@ static void check_voltage_type(unsigned long *dimm_populated, printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n"); printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n", (unsigned int)dimm_num); - hang(); + spd_ddr_init_hang (); break; } } @@ -1006,13 +1016,13 @@ static void program_copt1(unsigned long *dimm_populated, if ((dimm_populated[0] != SDRAM_NONE) && (dimm_populated[1] != SDRAM_NONE)) { if (buf0 != buf1) { printf("ERROR: DIMM's buffered/unbuffered, registered, clocking don't match.\n"); - hang(); + spd_ddr_init_hang (); } } if ((dimm_64bit == TRUE) && (dimm_32bit == TRUE)) { printf("ERROR: Cannot mix 32 bit and 64 bit DDR-SDRAM DIMMs together.\n"); - hang(); + spd_ddr_init_hang (); } else if ((dimm_64bit == TRUE) && (dimm_32bit == FALSE)) { mcopt1 |= SDRAM_MCOPT1_DMWD_64; @@ -1020,7 +1030,7 @@ static void program_copt1(unsigned long *dimm_populated, mcopt1 |= SDRAM_MCOPT1_DMWD_32; } else { printf("ERROR: Please install only 32 or 64 bit DDR-SDRAM DIMMs.\n\n"); - hang(); + spd_ddr_init_hang (); } if (ecc_enabled == TRUE) @@ -1209,7 +1219,7 @@ static void program_initplr(unsigned long *dimm_populated, break; default: printf("ERROR: ucode error on selected_cas value %d", selected_cas); - hang(); + spd_ddr_init_hang (); break; } @@ -1241,7 +1251,7 @@ static void program_initplr(unsigned long *dimm_populated, break; default: printf("ERROR: write recovery not support (%d)", write_recovery); - hang(); + spd_ddr_init_hang (); break; } #else @@ -1259,7 +1269,7 @@ static void program_initplr(unsigned long *dimm_populated, ods = ODS_REDUCED; } else { printf("ERROR: Unsupported number of DIMM's (%d)", total_dimm); - hang(); + spd_ddr_init_hang (); } mr = CMD_EMR | SELECT_MR | BURST_LEN_4 | wr | cas; @@ -1284,7 +1294,7 @@ static void program_initplr(unsigned long *dimm_populated, mtsdram(SDRAM_INITPLR13, 0x80800000 | emr); /* EMR OCD Exit */ } else { printf("ERROR: ucode error as unknown DDR type in program_initplr"); - hang(); + spd_ddr_init_hang (); } } @@ -1389,7 +1399,7 @@ static void program_mode(unsigned long *dimm_populated, } else { printf("ERROR: SPD reported Tcyc is incorrect for DIMM " "in slot %d\n", (unsigned int)dimm_num); - hang(); + spd_ddr_init_hang (); } } else { /* Convert from hex to decimal */ @@ -1526,7 +1536,7 @@ static void program_mode(unsigned long *dimm_populated, printf("ERROR: Cannot find a supported CAS latency with the installed DIMMs.\n"); printf("Only DIMMs DDR1 with CAS latencies of 2.0, 2.5, and 3.0 are supported.\n"); printf("Make sure the PLB speed is within the supported range of the DIMMs.\n\n"); - hang(); + spd_ddr_init_hang (); } } else { /* DDR2 */ debug("cas_3_0_available=%d\n", cas_3_0_available); @@ -1549,7 +1559,7 @@ static void program_mode(unsigned long *dimm_populated, cas_3_0_available, cas_4_0_available, cas_5_0_available); printf("sdram_freq=%d cycle3=%d cycle4=%d cycle5=%d\n\n", sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); - hang(); + spd_ddr_init_hang (); } } @@ -1658,7 +1668,7 @@ static void program_rtr(unsigned long *dimm_populated, printf("ERROR: DIMM %d unsupported refresh rate/type.\n", (unsigned int)dimm_num); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); break; } @@ -2066,7 +2076,7 @@ static void program_bxcf(unsigned long *dimm_populated, printf("ERROR: Unsupported value for number of " "column addresses: %d.\n", (unsigned int)num_col_addr); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); } } @@ -2148,7 +2158,7 @@ static void program_memory_queue(unsigned long *dimm_populated, printf("ERROR: Unsupported value for the banksize: %d.\n", (unsigned int)rank_size_id); printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); + spd_ddr_init_hang (); } if ((dimm_populated[dimm_num] != SDRAM_NONE) && (dimm_num == 1)) @@ -2693,7 +2703,7 @@ calibration_loop: printf("\nERROR: Cannot determine a common read delay for the " "DIMM(s) installed.\n"); debug("%s[%d] ERROR : \n", __FUNCTION__,__LINE__); - hang(); + spd_ddr_init_hang (); } blank_string(strlen(str)); @@ -2849,7 +2859,7 @@ static void test(void) if (window_found == FALSE) { printf("ERROR: Cannot determine a common read delay for the " "DIMM(s) installed.\n"); - hang(); + spd_ddr_init_hang (); } /*------------------------------------------------------------------ diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 6086b6c..8ecaaea 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1222,7 +1222,7 @@ mck_return: */ #ifdef CONFIG_440 .globl dcache_disable - .globl icache_disable + .globl icache_disable .globl icache_enable dcache_disable: icache_disable: |