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authorStefan Roese <sr@denx.de>2006-11-27 14:12:17 +0100
committerStefan Roese <sr@denx.de>2006-11-27 14:12:17 +0100
commit1c2ce2262069510f31c7d3fd7efd3d58b8c0c148 (patch)
treeda4f0c35f18200eab6953d163866bdb11a9eb6c6 /cpu/ppc4xx
parent48c7d6dba9140869a1d644248aa8cfabe01c98a6 (diff)
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[PATCH] Update Prodrive ALPR board support (440GX)
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx')
-rw-r--r--cpu/ppc4xx/4xx_enet.c5
-rw-r--r--cpu/ppc4xx/cpu.c4
-rw-r--r--cpu/ppc4xx/cpu_init.c4
3 files changed, 8 insertions, 5 deletions
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 81d49ff..8c517ba 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -470,8 +470,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
#else
if ((devnum == 0) || (devnum == 1)) {
out32 (ZMII_FER, (ZMII_FER_SMII | ZMII_FER_MDI) << ZMII_FER_V (devnum));
- }
- else { /* ((devnum == 2) || (devnum == 3)) */
+ } else { /* ((devnum == 2) || (devnum == 3)) */
out32 (ZMII_FER, ZMII_FER_MDI << ZMII_FER_V (devnum));
out32 (RGMII_FER, ((RGMII_FER_RGMII << RGMII_FER_V (2)) |
(RGMII_FER_RGMII << RGMII_FER_V (3))));
@@ -808,7 +807,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
hw_p->rx[i].ctrl |= MAL_RX_CTRL_EMPTY | MAL_RX_CTRL_INTR;
hw_p->rx_ready[i] = -1;
#if 0
- printf ("RX_BUFF %d @ 0x%08lx\n", i, (ulong) rx[i].data_ptr);
+ printf ("RX_BUFF %d @ 0x%08lx\n", i, (ulong) hw_p->rx[i].data_ptr);
#endif
}
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index faa5257..c45525d 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -426,8 +426,8 @@ int ppc440spe_revB() {
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
-#if defined(CONFIG_BOARD_RESET)
- board_reset();
+#if defined(CFG_4xx_RESET_TYPE)
+ mtspr(dbcr0, CFG_4xx_RESET_TYPE << 28);
#else
/*
* Initiate system reset in debug control register DBCR
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index def46f1..4b746b0 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -321,6 +321,10 @@ cpu_init_f (void)
#else
val |= 0xf0000000; /* generate system reset after 2.684 seconds */
#endif
+#if defined(CFG_4xx_RESET_TYPE)
+ val &= ~0x30000000; /* clear WRC bits */
+ val |= CFG_4xx_RESET_TYPE << 28; /* set board specific WRC type */
+#endif
mtspr(tcr, val);
val = mfspr(tsr);