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author | Stefan Roese <sr@denx.de> | 2008-10-13 10:45:14 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-10-21 17:35:02 +0200 |
commit | 43cbce69d48d052574d71f50724be546d90a46a4 (patch) | |
tree | 99013b2e419ce379b21591d2b2ecb3f476eb120f /cpu/ppc4xx | |
parent | d7b26d58328f137471ea97de382bfa63f7239931 (diff) | |
download | u-boot-imx-43cbce69d48d052574d71f50724be546d90a46a4.zip u-boot-imx-43cbce69d48d052574d71f50724be546d90a46a4.tar.gz u-boot-imx-43cbce69d48d052574d71f50724be546d90a46a4.tar.bz2 |
ppc4xx: Correctly setup ranges property in ebc node
Previously only the NOR flash mapping was written into the ranges
property of the ebc node. This patch now writes all enabled chip
select areas into the ranges property.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx')
-rw-r--r-- | cpu/ppc4xx/fdt.c | 45 |
1 files changed, 28 insertions, 17 deletions
diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c index a97484f..c55e1cf 100644 --- a/cpu/ppc4xx/fdt.c +++ b/cpu/ppc4xx/fdt.c @@ -37,29 +37,40 @@ DECLARE_GLOBAL_DATA_PTR; void __ft_board_setup(void *blob, bd_t *bd) { - u32 val[4]; int rc; + int i; + u32 bxcr; + u32 ranges[EBC_NUM_BANKS * 4]; + u32 *p = ranges; + char *ebc_path = "/plb/opb/ebc"; ft_cpu_setup(blob, bd); - /* Fixup NOR mapping */ - val[0] = 0; /* chip select number */ - val[1] = 0; /* always 0 */ - val[2] = gd->bd->bi_flashstart; - val[3] = gd->bd->bi_flashsize; - if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0) { - rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges", - val, sizeof(val), 1); - } else { - /* - * Some 405 PPC's have EBC as direct PLB child in the dts - */ - rc = fdt_find_and_setprop(blob, "/plb/ebc", "ranges", - val, sizeof(val), 1); + /* + * Read 4xx EBC bus bridge registers to get mappings of the + * peripheral banks into the OPB/PLB address space + */ + for (i = 0; i < EBC_NUM_BANKS; i++) { + mtdcr(ebccfga, EBC_BXCR(i)); + bxcr = mfdcr(ebccfgd); + + if ((bxcr & EBC_BXCR_BU_MASK) != EBC_BXCR_BU_NONE) { + *p++ = i; + *p++ = 0; + *p++ = bxcr & EBC_BXCR_BAS_MASK; + *p++ = EBC_BXCR_BANK_SIZE(bxcr); + } } - if (rc) - printf("Unable to update property NOR mapping, err=%s\n", + + /* Some 405 PPC's have EBC as direct PLB child in the dts */ + if (fdt_path_offset(blob, "/plb/opb/ebc") < 0) + strcpy(ebc_path, "/plb/ebc"); + rc = fdt_find_and_setprop(blob, ebc_path, "ranges", ranges, + (p - ranges) * sizeof(u32), 1); + if (rc) { + printf("Unable to update property EBC mappings, err=%s\n", fdt_strerror(rc)); + } } void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup"))); |