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| author | Benoît Monin <bmonin@adeneo.eu> | 2007-06-08 09:55:24 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-06-08 09:55:24 +0200 |
| commit | fba3fb0449b8a54542aed1e729de76e7f5a2ff1b (patch) | |
| tree | 4d8443944681c8ef18e6aa789e6035be61bd6447 /cpu/ppc4xx | |
| parent | 725671ccd2cd04c9ebc50c9e5a94dd8cbade66b7 (diff) | |
| download | u-boot-imx-fba3fb0449b8a54542aed1e729de76e7f5a2ff1b.zip u-boot-imx-fba3fb0449b8a54542aed1e729de76e7f5a2ff1b.tar.gz u-boot-imx-fba3fb0449b8a54542aed1e729de76e7f5a2ff1b.tar.bz2 | |
[PATCH] fix gpio setting when using CFG_440_GPIO_TABLE
Set the correct value in GPIOx_TCR when configuring the gpio
with CFG_440_GPIO_TABLE.
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx')
| -rw-r--r-- | cpu/ppc4xx/gpio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c index dd84e58..fb0f575 100644 --- a/cpu/ppc4xx/gpio.c +++ b/cpu/ppc4xx/gpio.c @@ -157,12 +157,12 @@ void gpio_set_chip_configuration(void) switch (gpio_tab[gpio_core][i].alt_nb) { case GPIO_SEL: if (gpio_core == GPIO0) { - reg = in32(GPIO0_TCR) | (0x80000000 >> (j)); + reg = in32(GPIO0_TCR) | (0x80000000 >> (i)); out32(GPIO0_TCR, reg); } if (gpio_core == GPIO1) { - reg = in32(GPIO1_TCR) | (0x80000000 >> (j)); + reg = in32(GPIO1_TCR) | (0x80000000 >> (i)); out32(GPIO1_TCR, reg); } |