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| author | Stefan Roese <sr@denx.de> | 2008-06-02 17:37:28 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-06-03 20:22:19 +0200 |
| commit | bbeff30cbd1c5d551eb0ad1c2239ec01844c0b0a (patch) | |
| tree | 48f48eadf87f5bc67d2673b7f1ba58a77e882dc2 /cpu/ppc4xx | |
| parent | 192f90e272b3989ee7b4a666d1fdab831f20f8d2 (diff) | |
| download | u-boot-imx-bbeff30cbd1c5d551eb0ad1c2239ec01844c0b0a.zip u-boot-imx-bbeff30cbd1c5d551eb0ad1c2239ec01844c0b0a.tar.gz u-boot-imx-bbeff30cbd1c5d551eb0ad1c2239ec01844c0b0a.tar.bz2 | |
ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.
This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:
csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG
I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx')
| -rw-r--r-- | cpu/ppc4xx/sdram.c | 10 | ||||
| -rw-r--r-- | cpu/ppc4xx/start.S | 6 |
2 files changed, 8 insertions, 8 deletions
diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c index 901d650..c7771ad 100644 --- a/cpu/ppc4xx/sdram.c +++ b/cpu/ppc4xx/sdram.c @@ -164,7 +164,7 @@ static ulong compute_rtr(ulong speed, ulong rows, ulong refresh) /* * Autodetect onboard SDRAM on 405 platforms */ -void sdram_init(void) +long int initdram(int board_type) { ulong speed; ulong sdtr1; @@ -232,9 +232,15 @@ void sdram_init(void) mtsdram(mem_mcopt1, 0); } #endif - return; + + /* + * OK, size detected -> all done + */ + return mb0cf[i].size; } } + + return 0; } #else /* CONFIG_440 */ diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 25ee369..426bf3c 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -217,7 +217,6 @@ .extern ext_bus_cntlr_init - .extern sdram_init #ifdef CONFIG_NAND_U_BOOT .extern reconfig_tlb0 #endif @@ -1119,11 +1118,6 @@ _start: stw r0, +12(r1) /* Save return addr (underflow vect) */ #endif /* CFG_INIT_DCACHE_CS */ - /*----------------------------------------------------------------------- */ - /* Initialize SDRAM Controller */ - /*----------------------------------------------------------------------- */ - bl sdram_init - #ifdef CONFIG_NAND_SPL bl nand_boot_common /* will not return */ #else |