summaryrefslogtreecommitdiff
path: root/cpu/ppc4xx
diff options
context:
space:
mode:
authorWolfgang Denk <wd@denx.de>2009-06-14 22:05:42 +0200
committerWolfgang Denk <wd@denx.de>2009-06-14 22:05:42 +0200
commit92afd368bba7d98b2b7bfb51082c3639bb2119b3 (patch)
tree74ffc8a3f4980f7c6bad6bf80bb41d3974eff685 /cpu/ppc4xx
parent6b1f78ae6ad037382ad430b07064105c88f7ac02 (diff)
parent388517e4b745b00256c2fa201ce7bccb67b4f245 (diff)
downloadu-boot-imx-92afd368bba7d98b2b7bfb51082c3639bb2119b3.zip
u-boot-imx-92afd368bba7d98b2b7bfb51082c3639bb2119b3.tar.gz
u-boot-imx-92afd368bba7d98b2b7bfb51082c3639bb2119b3.tar.bz2
Merge branch 'next' of ../master
Diffstat (limited to 'cpu/ppc4xx')
-rw-r--r--cpu/ppc4xx/40x_spd_sdram.c4
-rw-r--r--cpu/ppc4xx/44x_spd_ddr.c4
-rw-r--r--cpu/ppc4xx/cpu.c2
-rw-r--r--cpu/ppc4xx/i2c.c14
-rw-r--r--cpu/ppc4xx/start.S33
5 files changed, 28 insertions, 29 deletions
diff --git a/cpu/ppc4xx/40x_spd_sdram.c b/cpu/ppc4xx/40x_spd_sdram.c
index 57861b3..75bd70d 100644
--- a/cpu/ppc4xx/40x_spd_sdram.c
+++ b/cpu/ppc4xx/40x_spd_sdram.c
@@ -56,10 +56,6 @@
#define CONFIG_SYS_I2C_SPEED 50000
#endif
-#ifndef CONFIG_SYS_I2C_SLAVE
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-#endif
-
#define ONE_BILLION 1000000000
#define SDRAM0_CFG_DCE 0x80000000
diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c
index 153391e..f26fcda 100644
--- a/cpu/ppc4xx/44x_spd_ddr.c
+++ b/cpu/ppc4xx/44x_spd_ddr.c
@@ -66,10 +66,6 @@
#define CONFIG_SYS_I2C_SPEED 50000
#endif
-#ifndef CONFIG_SYS_I2C_SLAVE
-#define CONFIG_SYS_I2C_SLAVE 0xFE
-#endif
-
#define ONE_BILLION 1000000000
/*
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index 9a6a8d7..06f44ad 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -597,7 +597,7 @@ int checkcpu (void)
printf (" Internal PCI arbiter %sabled", pci_arbiter_enabled() ? "en" : "dis");
#endif
-#if defined(PCI_ASYNC)
+#if defined(CONFIG_PCI) && defined(PCI_ASYNC)
if (pci_async_enabled()) {
printf (", PCI async ext clock used");
} else {
diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c
index 9d416ca..e3e1bab 100644
--- a/cpu/ppc4xx/i2c.c
+++ b/cpu/ppc4xx/i2c.c
@@ -438,18 +438,4 @@ int i2c_set_bus_num(unsigned int bus)
return 0;
}
#endif /* CONFIG_I2C_MULTI_BUS */
-
-/* TODO: add 100/400k switching */
-unsigned int i2c_get_bus_speed(void)
-{
- return CONFIG_SYS_I2C_SPEED;
-}
-
-int i2c_set_bus_speed(unsigned int speed)
-{
- if (speed != CONFIG_SYS_I2C_SPEED)
- return -1;
-
- return 0;
-}
#endif /* CONFIG_HARD_I2C */
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index f2b8908..ac96fc2 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -257,6 +257,14 @@
bl board_init_f
#endif
+#if defined(CONFIG_SYS_RAMBOOT)
+ /*
+ * 4xx RAM-booting U-Boot image is started from offset 0
+ */
+ .text
+ bl _start_440
+#endif
+
/*
* 440 Startup -- on reset only the top 4k of the effective
* address space is mapped in by an entry in the instruction
@@ -444,10 +452,17 @@ skip_debug_init:
addis r0,0,0x0000
li r1,0x003f /* 64 TLB entries */
mtctr r1
-rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/
- tlbwe r0,r1,0x0001
- tlbwe r0,r1,0x0002
- subi r1,r1,0x0001
+ li r4,0 /* Start with TLB #0 */
+rsttlb:
+#ifdef CONFIG_SYS_RAMBOOT
+ tlbre r3,r4,0 /* Read contents from TLB word #0 to get EPN */
+ rlwinm. r3,r3,0,0xfffffc00 /* Mask EPN */
+ beq tlbnxt /* Skip EPN=0 TLB, this is the SDRAM TLB */
+#endif
+ tlbwe r0,r4,0 /* Invalidate all entries (V=0)*/
+ tlbwe r0,r4,1
+ tlbwe r0,r4,2
+tlbnxt: addi r4,r4,1 /* Next TLB */
bdnz rsttlb
/*----------------------------------------------------------------*/
@@ -476,7 +491,13 @@ rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/
li r4,0 /* TLB # */
addi r5,r5,-4
-1: lwzu r0,4(r5)
+1:
+#ifdef CONFIG_SYS_RAMBOOT
+ tlbre r3,r4,0 /* Read contents from TLB word #0 */
+ rlwinm. r3,r3,0,0x00000200 /* Mask V (valid) bit */
+ bne tlbnx2 /* Skip V=1 TLB, this is the SDRAM TLB */
+#endif
+ lwzu r0,4(r5)
cmpwi r0,0
beq 2f /* 0 marks end */
lwzu r1,4(r5)
@@ -484,7 +505,7 @@ rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/
tlbwe r0,r4,0 /* TLB Word 0 */
tlbwe r1,r4,1 /* TLB Word 1 */
tlbwe r2,r4,2 /* TLB Word 2 */
- addi r4,r4,1 /* Next TLB */
+tlbnx2: addi r4,r4,1 /* Next TLB */
bdnz 1b
/*----------------------------------------------------------------*/