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| author | Wolfgang Denk <wd@denx.de> | 2007-06-22 23:59:00 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-06-22 23:59:00 +0200 |
| commit | 1636d1c8529c006d106287cfbc20cd0a246fe1cb (patch) | |
| tree | cd39e784361c2bcef43cfc38d39b1670ce22d539 /cpu/ppc4xx | |
| parent | 2dc64451b4c08ffd619372abfdc2506a2e2363b9 (diff) | |
| download | u-boot-imx-1636d1c8529c006d106287cfbc20cd0a246fe1cb.zip u-boot-imx-1636d1c8529c006d106287cfbc20cd0a246fe1cb.tar.gz u-boot-imx-1636d1c8529c006d106287cfbc20cd0a246fe1cb.tar.bz2 | |
Coding stylke cleanup; rebuild CHANGELOG
Diffstat (limited to 'cpu/ppc4xx')
| -rw-r--r-- | cpu/ppc4xx/44x_spd_ddr.c | 4 | ||||
| -rw-r--r-- | cpu/ppc4xx/44x_spd_ddr2.c | 4 | ||||
| -rw-r--r-- | cpu/ppc4xx/cpu_init.c | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c index fe7bbab..e24cd81 100644 --- a/cpu/ppc4xx/44x_spd_ddr.c +++ b/cpu/ppc4xx/44x_spd_ddr.c @@ -1340,14 +1340,14 @@ static unsigned long program_bxcr(unsigned long *dimm_populated, */ cr |= SDRAM_BXCR_SDBE; - for (i = 0; i < num_banks; i++) { + for (i = 0; i < num_banks; i++) { bank_parms[ctrl_bank_num[dimm_num]+i].bank_size_bytes = (4 << 20) * bank_size_id; bank_parms[ctrl_bank_num[dimm_num]+i].cr = cr; debug("DIMM%d-bank %d (SDRAM0_B%dCR): bank_size_bytes=%d\n", dimm_num, i, ctrl_bank_num[dimm_num]+i, bank_parms[ctrl_bank_num[dimm_num]+i].bank_size_bytes); - } + } } } diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index 874cec0..b5c0f53 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -58,8 +58,8 @@ #define SDRAM_DDR2 2 #define SDRAM_NONE 0 -#define MAXDIMMS 2 -#define MAXRANKS 4 +#define MAXDIMMS 2 +#define MAXRANKS 4 #define MAXBXCF 4 #define MAX_SPD_BYTES 256 /* Max number of bytes on the DIMM's SPD EEPROM */ diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index bc1ae0e..351da36 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -153,7 +153,7 @@ cpu_init_f (void) */ asm volatile(" bl 0f" ::: "lr"); asm volatile("0: mflr 3" ::: "r3"); - asm volatile(" addi 4, 0, 14" ::: "r4"); + asm volatile(" addi 4, 0, 14" ::: "r4"); asm volatile(" mtctr 4" ::: "ctr"); asm volatile("1: icbt 0, 3"); asm volatile(" addi 3, 3, 32" ::: "r3"); |