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| author | Stefan Roese <sr@denx.de> | 2007-03-01 21:11:36 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-03-01 21:11:36 +0100 |
| commit | ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35 (patch) | |
| tree | 1870475942be67d0516fc69095731bee3f925a99 /cpu/ppc4xx/tlb.c | |
| parent | 6c7cac8c4fce0ea2bf8e15ed8658d87974155b44 (diff) | |
| download | u-boot-imx-ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35.zip u-boot-imx-ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35.tar.gz u-boot-imx-ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35.tar.bz2 | |
[PATCH] Update AMCC Katmai 440SPe eval board support
This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.
Please note, that still some problems are left with some memory
configurations. See the driver for more details.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/tlb.c')
| -rw-r--r-- | cpu/ppc4xx/tlb.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c index 8c60559..08ae76c 100644 --- a/cpu/ppc4xx/tlb.c +++ b/cpu/ppc4xx/tlb.c @@ -166,13 +166,13 @@ static void program_tlb_addr(unsigned long base_addr, unsigned long mem_size, * Common usage for boards with SDRAM DIMM modules to dynamically * configure the TLB's for the SDRAM */ -void program_tlb(u32 start, u32 size) +void program_tlb(u32 start, u32 size, u32 tlb_word2_i_value) { region_t region_array; region_array.base = start; region_array.size = size; - region_array.tlb_word2_i_value = TLB_WORD2_I_ENABLE; /* disable cache (for now) */ + region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */ /* Call the routine to add in the tlb entries for the memory regions */ program_tlb_addr(region_array.base, region_array.size, |