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authorStefan Roese <sr@denx.de>2007-07-04 08:11:37 +0200
committerStefan Roese <sr@denx.de>2007-07-04 08:11:37 +0200
commit8e990cb076a1c77daf3a50cc0df9732135e9eef5 (patch)
tree3b860d74bb4ddc5e0c9485e44da1bc0a08ed839c /cpu/ppc4xx/tlb.c
parentd677b32855f577ae2690dcd64a172cdd706e0ffc (diff)
parent98c440bee623ecdd5322852732b883e696fb2140 (diff)
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Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'cpu/ppc4xx/tlb.c')
-rw-r--r--cpu/ppc4xx/tlb.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c
index 6c916ef..049a785 100644
--- a/cpu/ppc4xx/tlb.c
+++ b/cpu/ppc4xx/tlb.c
@@ -101,6 +101,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_256MB, tlb_i)) == 0) {
mem_size -= TLB_256MB_SIZE;
phys_addr += TLB_256MB_SIZE;
+ virt_addr += TLB_256MB_SIZE;
}
} else if (((phys_addr & TLB_16MB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_16MB_SIZE)) {
@@ -109,6 +110,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_16MB, tlb_i)) == 0) {
mem_size -= TLB_16MB_SIZE;
phys_addr += TLB_16MB_SIZE;
+ virt_addr += TLB_16MB_SIZE;
}
} else if (((phys_addr & TLB_1MB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_1MB_SIZE)) {
@@ -117,6 +119,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_1MB, tlb_i)) == 0) {
mem_size -= TLB_1MB_SIZE;
phys_addr += TLB_1MB_SIZE;
+ virt_addr += TLB_1MB_SIZE;
}
} else if (((phys_addr & TLB_256KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_256KB_SIZE)) {
@@ -125,6 +128,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_256KB, tlb_i)) == 0) {
mem_size -= TLB_256KB_SIZE;
phys_addr += TLB_256KB_SIZE;
+ virt_addr += TLB_256KB_SIZE;
}
} else if (((phys_addr & TLB_64KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_64KB_SIZE)) {
@@ -133,6 +137,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_64KB, tlb_i)) == 0) {
mem_size -= TLB_64KB_SIZE;
phys_addr += TLB_64KB_SIZE;
+ virt_addr += TLB_64KB_SIZE;
}
} else if (((phys_addr & TLB_16KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_16KB_SIZE)) {
@@ -141,6 +146,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_16KB, tlb_i)) == 0) {
mem_size -= TLB_16KB_SIZE;
phys_addr += TLB_16KB_SIZE;
+ virt_addr += TLB_16KB_SIZE;
}
} else if (((phys_addr & TLB_4KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_4KB_SIZE)) {
@@ -149,6 +155,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_4KB, tlb_i)) == 0) {
mem_size -= TLB_4KB_SIZE;
phys_addr += TLB_4KB_SIZE;
+ virt_addr += TLB_4KB_SIZE;
}
} else if (((phys_addr & TLB_1KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_1KB_SIZE)) {
@@ -157,6 +164,7 @@ static void program_tlb_addr(unsigned long phys_addr,
TLB_WORD0_SIZE_1KB, tlb_i)) == 0) {
mem_size -= TLB_1KB_SIZE;
phys_addr += TLB_1KB_SIZE;
+ virt_addr += TLB_1KB_SIZE;
}
} else {
printf("ERROR: no TLB size exists for the base address 0x%0X.\n",